From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C9300C43461 for ; Fri, 11 Sep 2020 15:10:19 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 42FEA208FE for ; Fri, 11 Sep 2020 15:10:18 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="k760a+eD" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 42FEA208FE Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Xx2wq3j/H1P9UtXGY5sYPi+d7CdBx8d/9t8OHWUA8Jk=; b=k760a+eDWUpAyyJ0rEkkmotrY JriQoORqs3GyKIZ/kuScA3jYt65x5KKm8Qv3whwWIV+z9zY7UAUXpBTDSXcQUpKlC3A/495ZoTDku +7qdf6sE4waZ1B/96sws3GsoqnEQ1p8fJOO7ExJSpKgtWj6VmpPLVuQECKYqtXEwEA8rCeObVxhyK hsDRoFwhT8NY7Q1oYAkSJxf50yS2I6iAUlgMAipQ6761cA24rvIcMNV2vuKNOM9kg+aKYEOV2urD6 uzuwVKHtfokvpDYf5KyethfYPorwKtTjARg4SaD0KkahyGVZzLK8t/6rNRP+klWC+BaFeDYL/4FNZ 3PMeQHfpA==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kGkcW-0001Es-DD; Fri, 11 Sep 2020 15:05:48 +0000 Received: from mail.kernel.org ([198.145.29.99]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kGkcT-0001E3-33 for linux-arm-kernel@lists.infradead.org; Fri, 11 Sep 2020 15:05:45 +0000 Received: from gaia (unknown [46.69.195.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 3E29E20575; Fri, 11 Sep 2020 15:05:42 +0000 (UTC) Date: Fri, 11 Sep 2020 16:05:39 +0100 From: Catalin Marinas To: Marc Zyngier Subject: Re: [PATCH v3 03/16] arm64: Allow IPIs to be handled as normal interrupts Message-ID: <20200911150539.GD12835@gaia> References: <20200901144324.1071694-1-maz@kernel.org> <20200901144324.1071694-4-maz@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200901144324.1071694-4-maz@kernel.org> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200911_110545_191373_0CAA5B89 X-CRM114-Status: GOOD ( 20.56 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sumit Garg , Florian Fainelli , Russell King , Jason Cooper , Saravana Kannan , Andrew Lunn , kernel-team@android.com, Gregory Clement , linux-kernel@vger.kernel.org, Thomas Gleixner , Will Deacon , Valentin Schneider , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Sep 01, 2020 at 03:43:11PM +0100, Marc Zyngier wrote: > In order to deal with IPIs as normal interrupts, let's add > a new way to register them with the architecture code. > > set_smp_ipi_range() takes a range of interrupts, and allows > the arch code to request them as if the were normal interrupts. > A standard handler is then called by the core IRQ code to deal > with the IPI. > > This means that we don't need to call irq_enter/irq_exit, and > that we don't need to deal with set_irq_regs either. So let's > move the dispatcher into its own function, and leave handle_IPI() > as a compatibility function. > > On the sending side, let's make use of ipi_send_mask, which > already exists for this purpose. > > One of the major difference is that we end up, in some cases > (such as when performing IRQ time accounting on the scheduler > IPI), end up with nested irq_enter()/irq_exit() pairs. > Other than the (relatively small) overhead, there should be > no consequences to it (these pairs are designed to nest > correctly, and the accounting shouldn't be off). > > Reviewed-by: Valentin Schneider > Signed-off-by: Marc Zyngier In case you need an ack for the arm64 part: Acked-by: Catalin Marinas _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel