Re: [PATCH v5 2/2] arm64: Add workaround for Arm Cortex-A77 erratum 1508412

Catalin Marinas
2020-09-11T15:43:42Z

On Fri, Sep 11, 2020 at 04:28:07PM +0100, Will Deacon wrote:
> On Fri, Sep 11, 2020 at 11:37:14AM +0100, Catalin Marinas wrote:
> > On Wed, Sep 09, 2020 at 05:13:10PM -0600, Rob Herring wrote:
> > > diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> > > index 554a7e8ecb07..55dfff8ca466 100644
> > > --- a/arch/arm64/include/asm/sysreg.h
> > > +++ b/arch/arm64/include/asm/sysreg.h
> > > @@ -943,6 +943,7 @@
> > >
> > > #include <linux/build_bug.h>
> > > #include <linux/types.h>
> > > +#include <asm/alternative.h>
> > >
> > > #define __DEFINE_MRS_MSR_S_REGNUM \
> > > " .irp num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30\n" \
> > > @@ -1024,6 +1025,17 @@
> > > write_sysreg(__scs_new, sysreg); \
> > > } while (0)
> > >
> > > +#define read_sysreg_par() ({ \
> > > + unsigned long flags; \
> > > + u64 par; \
> > > + local_irq_save(flags); \
> > > + asm(ALTERNATIVE("nop", "dmb sy", ARM64_WORKAROUND_1508412)); \
> > > + par = read_sysreg(par_el1); \
> > > + asm(ALTERNATIVE("nop", "dmb sy", ARM64_WORKAROUND_1508412)); \
> > > + local_irq_restore(flags); \
> > > + par; \
> > > +})
> >
> > As an alternative to local_irq_save/restore, we could have added a dmb
> > in the kernel_exit macro. The minor nit here is that we always disable
> > interrupts even when the erratum doesn't apply.
> >
> > The EL1 code accessing PAR_EL1 already runs with interrupts disabled
> > (which covers the prior AT instruction). If that's the case for KVM as
> > well, we could drop the local_irq_* entirely and just leave the DMB in
> > the exit to guest code.
>
> I wonder if that's actually a more robust approach in the case of psuedo
> NMIs using ARM64_HAS_IRQ_PRIO_MASKING?

Good point, so better do the dmb on the return path for both kernel and
hyp.

--
Catalin