From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 03B9BC43461 for ; Fri, 11 Sep 2020 21:53:04 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 81E7722207 for ; Fri, 11 Sep 2020 21:53:03 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="lO20B9Zw" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 81E7722207 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:To:From: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=JVP4zI5CjBUbiUd2a4SN5pheWdGL4PyeHgaIGug8e5U=; b=lO20B9Zwbx8TZhrfkj/6ZIuwXW 1EjDotNaLJdPqlRIrUl44LnJfgVD+pGU6u4WuIy1tFC5zpGWIkaBp7p/yUdbFJ2GnuuI9bPHkpkBw OZeft12qawgfEx0yBXboignm5bO85C3+roTDZuXo7F5sg0tlQJCwWd4WdQv9lxFtDQaUno1qVHrn8 wGMBnmLvZnwBS52WOnL4kpUCYCij58PI8k24NUTBaq3sND7khzNhyu/rXnaVhomFxA0Oe4f031OF3 1ggNheCZHsYfRDT5Xew//SgZfgWvP/4m+Rv9S83gm4ex6olDuN3Q8TVpYdycfDxkWkSOiKljkCvbb 2vKmWRfw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kGqx4-0003rX-Vi; Fri, 11 Sep 2020 21:51:27 +0000 Received: from mail-io1-f66.google.com ([209.85.166.66]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kGqx1-0003pH-RC for linux-arm-kernel@lists.infradead.org; Fri, 11 Sep 2020 21:51:24 +0000 Received: by mail-io1-f66.google.com with SMTP id u126so12599122iod.12 for ; Fri, 11 Sep 2020 14:51:21 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=8b7LSNxFBMXfkQ9+O4qJULGEgaNjsKsj1DUpH/bPVcU=; b=gzJKTVX3+v/p3wNpUFg2ZoPs1k6ozYlxf5Cb22Kg2nZkjj7GvezD6UorWjceRXd3kO LKbCFqP+gHj4emFw6H+EsfAE0nG6WCxdU/9QfM7py+lNVmhDvOolzGdr0O5TP0wOi1u1 SOyNFNefJjjPC8Z6bXQyr1AIwFJmEsROQBBnNyGJ3/+BUntoZZfMALOFiOVpKwwnJYXT aM+AsspmQShCeXg/vufdMwlHylNhDF7tEuJVRBlFzRQGDQM3Vo5wyT/Zr8RTKyx1VLzk ICRJEfNtRvL0pM+vw7I3s1wkTgBUz9sbY5oyhLvpT/X6h68TQ31aPrjqMe1y7asgmlhz 5czg== X-Gm-Message-State: AOAM530vMVNEj/aAZtblx04Ogf8HqCpL7A2cB3KIZLecQ36CxOc6UU4u q3Rq+O1zQ+ffn0FVQ+VRDQ== X-Google-Smtp-Source: ABdhPJxtYa/RYHb4QM1EhvMdFyuoZ9Z7q5I1sxA7/dbcyos4ABSYRuvOY+v3/djDXJqtzgQE+OussQ== X-Received: by 2002:a05:6638:611:: with SMTP id g17mr3846451jar.40.1599861080426; Fri, 11 Sep 2020 14:51:20 -0700 (PDT) Received: from xps15.herring.priv ([64.188.179.251]) by smtp.googlemail.com with ESMTPSA id a20sm1927966ilq.57.2020.09.11.14.51.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Sep 2020 14:51:19 -0700 (PDT) From: Rob Herring To: Will Deacon , Catalin Marinas , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Jiri Olsa Subject: [PATCH v3 0/10] libperf and arm64 userspace counter access support Date: Fri, 11 Sep 2020 15:51:08 -0600 Message-Id: <20200911215118.2887710-1-robh@kernel.org> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200911_175123_883241_3C0D9AD3 X-CRM114-Status: GOOD ( 21.22 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Ian Rogers , Alexander Shishkin , linux-kernel@vger.kernel.org, honnappa.nagarahalli@arm.com, Raphael Gault , Jonathan Cameron , Namhyung Kim , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This is resurrecting Raphael's series[1] to enable userspace counter access on arm64. My previous versions are here[2][3]. Changes in v3: - Dropped removing x86 rdpmc test until libperf tests can run via 'perf test' - Added verbose prints for tests - Split adding perf_evsel__mmap() to separate patch The following changes to the arm64 support have been made compared to Raphael's last version: The major change is support for heterogeneous systems with some restrictions. Specifically, userspace must pin itself to like CPUs, open a specific PMU by type, and use h/w specific events. The tests have been reworked to demonstrate this. Chained events are not supported. The problem with supporting chained events was there's no way to distinguish between a chained event and a native 64-bit counter. We could add some flag, but do self monitoring processes really need that? Native 64-bit counters are supported if the PMU h/w has support. As there's already an explicit ABI to request 64-bit counters, userspace can request 64-bit counters and if user access is not enabled, then it must retry with 32-bit counters. Prior versions broke the build on arm32 (surprisingly never caught by 0-day). As a result, event_mapped and event_unmapped implementations have been moved into the arm64 code. There was a bug in that pmc_width was not set in the user page. The tests now check for this. The documentation has been converted to rST. I've added sections on chained events and heterogeneous. The tests have been expanded to test the cycle counter access. Rob [1] https://lore.kernel.org/linux-arm-kernel/20190822144220.27860-1-raphael.gault@arm.com/ [2] https://lore.kernel.org/linux-arm-kernel/20200707205333.624938-1-robh@kernel.org/ [3] https://lore.kernel.org/linux-arm-kernel/20200828205614.3391252-1-robh@kernel.org/ Raphael Gault (4): arm64: pmu: Add hook to handle pmu-related undefined instructions arm64: pmu: Add function implementation to update event index in userpage arm64: perf: Enable pmu counter direct access for perf event on armv8 Documentation: arm64: Document PMU counters access from userspace Rob Herring (6): tools/include: Add an initial math64.h libperf: Add libperf_evsel__mmap() libperf: tests: Add support for verbose printing libperf: Add support for user space counter access libperf: Add arm64 support to perf_mmap__read_self() perf: arm64: Add test for userspace counter access on heterogeneous systems Documentation/arm64/index.rst | 1 + .../arm64/perf_counter_user_access.rst | 56 ++++++ arch/arm64/include/asm/mmu.h | 5 + arch/arm64/include/asm/mmu_context.h | 2 + arch/arm64/include/asm/perf_event.h | 14 ++ arch/arm64/kernel/cpufeature.c | 4 +- arch/arm64/kernel/perf_event.c | 116 +++++++++++ include/linux/perf/arm_pmu.h | 2 + tools/include/linux/math64.h | 75 +++++++ tools/lib/perf/Documentation/libperf.txt | 1 + tools/lib/perf/evsel.c | 34 ++++ tools/lib/perf/include/internal/evsel.h | 2 + tools/lib/perf/include/internal/mmap.h | 3 + tools/lib/perf/include/internal/tests.h | 32 +++ tools/lib/perf/include/perf/evsel.h | 2 + tools/lib/perf/libperf.map | 1 + tools/lib/perf/mmap.c | 188 ++++++++++++++++++ tools/lib/perf/tests/Makefile | 4 +- tools/lib/perf/tests/test-evsel.c | 63 ++++++ tools/perf/arch/arm64/include/arch-tests.h | 7 + tools/perf/arch/arm64/tests/Build | 1 + tools/perf/arch/arm64/tests/arch-tests.c | 4 + tools/perf/arch/arm64/tests/user-events.c | 170 ++++++++++++++++ 23 files changed, 784 insertions(+), 3 deletions(-) create mode 100644 Documentation/arm64/perf_counter_user_access.rst create mode 100644 tools/include/linux/math64.h create mode 100644 tools/perf/arch/arm64/tests/user-events.c -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel