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Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kIxFQ-00018I-3N; Thu, 17 Sep 2020 16:59:04 +0000 Received: from mail.kernel.org ([198.145.29.99]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kIxFN-00017a-LO for linux-arm-kernel@lists.infradead.org; Thu, 17 Sep 2020 16:59:02 +0000 Received: from gaia (unknown [31.124.44.166]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 5906E2064B; Thu, 17 Sep 2020 16:58:58 +0000 (UTC) Date: Thu, 17 Sep 2020 17:58:55 +0100 From: Catalin Marinas To: Andrey Konovalov Subject: Re: [PATCH v2 27/37] arm64: mte: Switch GCR_EL1 in kernel entry and exit Message-ID: <20200917165855.GH10662@gaia> References: <20200917165221.GF10662@gaia> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200917165221.GF10662@gaia> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200917_125901_770428_F10189BD X-CRM114-Status: GOOD ( 18.65 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Branislav Rankov , Elena Petrova , Kevin Brodsky , Will Deacon , Marco Elver , kasan-dev@googlegroups.com, linux-kernel@vger.kernel.org, linux-mm@kvack.org, Alexander Potapenko , Evgenii Stepanov , Dmitry Vyukov , Andrey Ryabinin , Andrew Morton , Vincenzo Frascino , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Sep 17, 2020 at 05:52:21PM +0100, Catalin Marinas wrote: > On Tue, Sep 15, 2020 at 11:16:09PM +0200, Andrey Konovalov wrote: > > diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S > > index ff34461524d4..79a6848840bd 100644 > > --- a/arch/arm64/kernel/entry.S > > +++ b/arch/arm64/kernel/entry.S > > @@ -175,6 +175,28 @@ alternative_else_nop_endif > > #endif > > .endm > > > > + .macro mte_restore_gcr, el, tsk, tmp, tmp2 > > +#ifdef CONFIG_ARM64_MTE > > +alternative_if_not ARM64_MTE > > + b 1f > > +alternative_else_nop_endif > > + .if \el == 0 > > + ldr \tmp, [\tsk, #THREAD_GCR_EL1_USER] > > + .else > > + ldr_l \tmp, gcr_kernel_excl > > + .endif > > + /* > > + * Calculate and set the exclude mask preserving > > + * the RRND (bit[16]) setting. > > + */ > > + mrs_s \tmp2, SYS_GCR_EL1 > > + bfi \tmp2, \tmp, #0, #16 > > + msr_s SYS_GCR_EL1, \tmp2 > > + isb > > +1: > > +#endif > > + .endm > > + > > .macro kernel_entry, el, regsize = 64 > > .if \regsize == 32 > > mov w0, w0 // zero upper 32 bits of x0 > > @@ -214,6 +236,8 @@ alternative_else_nop_endif > > > > ptrauth_keys_install_kernel tsk, x20, x22, x23 > > > > + mte_restore_gcr 1, tsk, x22, x23 > > + > > scs_load tsk, x20 > > .else > > add x21, sp, #S_FRAME_SIZE > > @@ -332,6 +356,8 @@ alternative_else_nop_endif > > /* No kernel C function calls after this as user keys are set. */ > > ptrauth_keys_install_user tsk, x0, x1, x2 > > > > + mte_restore_gcr 0, tsk, x0, x1 > > Some nitpicks on these macros to match the ptrauth_keys_* above. Define > separate mte_set_{user,kernel}_gcr macros with a common mte_set_gcr that > is used by both. One more thing - the new mte_set_kernel_gcr should probably skip the GCR_EL1 update if KASAN_HW_TAGS is disabled. -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel