From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 253AAC43464 for ; Fri, 18 Sep 2020 09:40:48 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B3A982072E for ; Fri, 18 Sep 2020 09:40:47 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="tyJl85sq" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B3A982072E Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=thEEPU1CGPr19mKwNSx2n0SucZB648Hfa4PcMIBL2WI=; b=tyJl85sqgi2VqafNnyS+BtqkY +2xIuRhlGFAnzhEBi+EVWDxp0N3pyggElMUEDYHZCjnXF4rbxM9d4saK7JNpDK9U5b29/Xb3SFS8X MMQhvSL93C4FLmDYhe5q6F3nVWefv+7IqyvSaazhXtowK9znULopzc1uMbir5aQMTLIXG2OtMjSTG UYbQV4D3VvcFuXAeYx4FmPm7X4pT3cUFW74mA5DlitIbAA9oKvFFjdZIrlcEVQmZpKhELAHeu6Gzr GZUpawMjSkl9PgubeghKyNkL+gES+bDIqyGg8xrurruiZostzAw1iA8A15/XXpE6eHhZ5pFU6bQWm f+A+ML+yg==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kJCrU-0004hC-Av; Fri, 18 Sep 2020 09:39:24 +0000 Received: from mail.kernel.org ([198.145.29.99]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kJCrQ-0004fb-UA for linux-arm-kernel@lists.infradead.org; Fri, 18 Sep 2020 09:39:21 +0000 Received: from gaia (unknown [31.124.44.166]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 5ED6F21D20; Fri, 18 Sep 2020 09:39:17 +0000 (UTC) Date: Fri, 18 Sep 2020 10:39:14 +0100 From: Catalin Marinas To: Vincenzo Frascino Subject: Re: [PATCH v2 27/37] arm64: mte: Switch GCR_EL1 in kernel entry and exit Message-ID: <20200918093914.GC6335@gaia> References: <20200917165221.GF10662@gaia> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200918_053921_057608_FFAADFEE X-CRM114-Status: GOOD ( 15.63 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-kernel@lists.infradead.org, Marco Elver , Elena Petrova , Andrey Konovalov , Kevin Brodsky , Will Deacon , Branislav Rankov , kasan-dev@googlegroups.com, linux-kernel@vger.kernel.org, linux-mm@kvack.org, Alexander Potapenko , Evgenii Stepanov , Andrey Ryabinin , Andrew Morton , Dmitry Vyukov Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Sep 17, 2020 at 07:47:59PM +0100, Vincenzo Frascino wrote: > On 9/17/20 5:52 PM, Catalin Marinas wrote: > >> +void mte_init_tags(u64 max_tag) > >> +{ > >> + u64 incl = GENMASK(max_tag & MTE_TAG_MAX, 0); > >> + > >> + gcr_kernel_excl = ~incl & SYS_GCR_EL1_EXCL_MASK; > >> +} > > Do we need to set the actual GCR_EL1 register here? We may not get an > > exception by the time KASAN starts using it. > > It is ok not setting it here because to get exceptions cpuframework mte enable > needs to be executed first. In that context we set even the register. OK, that should do for now. If we ever add stack tagging, we'd have to rethink the GCR_EL1 initialisation. -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel