From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6EFA9C43464 for ; Fri, 18 Sep 2020 11:09:22 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E51DD20874 for ; Fri, 18 Sep 2020 11:09:21 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="F/KTiihW" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E51DD20874 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=62c0k/0aB4FbBMNIoxleSsYe5I1ZT/xtQSVWNQ2y1gY=; b=F/KTiihWCYxl5VRIFz6hInlHD ROXcD7u6KDdL/Nz5PBkcEz6jAUNbpfnSxqWxkKvaOv5v4Q8DanGp/4R1+gMQg9yKBrVZRooJBI2wv WnnPhTaQIU2n4nyiNuCOjNMgKoItOu9hIsQ4mDqrfYaUbyMVRbaIOSFM+n+iPdcUNDYEna+ZBAyEH Ec0d0BZ6nN3SzTQsfN4XFNKn7FgS9WtKAdFIJ/sPaVHhVc12Rs5pgP33y/hekruNOB8m9u/8xQrlh VjrEzIK/ZJwiOwt5Yvd3IO8ZrVYIUu0HewcIAxvwKFG7zzhO2P3MTu+RgLORMd7AYvIyo/pTSmGBO ALRD69HgQ==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kJEF9-0000cK-B5; Fri, 18 Sep 2020 11:07:55 +0000 Received: from mail.kernel.org ([198.145.29.99]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kJEF5-0000b6-Gb for linux-arm-kernel@lists.infradead.org; Fri, 18 Sep 2020 11:07:53 +0000 Received: from gaia (unknown [31.124.44.166]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id D3B3220874; Fri, 18 Sep 2020 11:07:48 +0000 (UTC) Date: Fri, 18 Sep 2020 12:07:46 +0100 From: Catalin Marinas To: Clint Sbisa Subject: Re: [PATCH v2] arm64: Enable PCI write-combine resources under sysfs Message-ID: <20200918110745.GD6335@gaia> References: <20200918033312.ddfpibgfylfjpex2@amazon.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200918033312.ddfpibgfylfjpex2@amazon.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200918_070752_146983_DB8E13EE X-CRM114-Status: GOOD ( 19.53 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lorenzo Pieralisi , Benjamin Herrenschmidt , linux-kernel@vger.kernel.org, Bjorn Helgaas , Jason Gunthorpe , Will Deacon , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Sep 18, 2020 at 03:33:12AM +0000, Clint Sbisa wrote: > This change exposes write-combine mappings under sysfs for > prefetchable PCI resources on arm64. > > Originally, the usage of "write combine" here was driven by the x86 > definition of write combine. This definition is specific to x86 and > does not generalize to other architectures. However, the usage of WC > has mutated to "write combine" semantics, which is implemented > differently on each arch. > > Generally, prefetchable BARs are accepted to allow speculative > accesses, write combining, and re-ordering-- from the PCI perspective, > this means there are no read side effects. (This contradicts the PCI > spec which allows prefetchable BARs to have read side effects, but > this definition is ill-advised as it is impossible to meet.) On x86, > prefetchable BARs are mapped as WC as originally defined (with some > conditionals on arch features). On arm64, WC is taken to mean normal > non-cacheable memory. > > In practice, write combine semantics are used to minimize write > operations. A common usage of this is minimizing PCI TLPs which can > significantly improve performance with PCI devices. In order to > provide the same benefits to userspace, we need to allow userspace to > map prefetchable BARs with write combine semantics. The resourceX_wc > mapping is used today by userspace programs and libraries. > > While this model is flawed as "write combine" is very ill-defined, it > is already used by multiple non-x86 archs to expose write combine > semantics to user space. We enable this on arm64 to give userspace on > arm64 an equivalent mechanism for utilizing write combining with PCI > devices. > > Cc: Benjamin Herrenschmidt > Cc: Bjorn Helgaas > Cc: Catalin Marinas > Cc: Jason Gunthorpe > Cc: Lorenzo Pieralisi > Cc: Will Deacon > Signed-off-by: Clint Sbisa Acked-by: Catalin Marinas _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel