From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5D5C6C43464 for ; Sat, 19 Sep 2020 12:47:13 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 050D42158C for ; Sat, 19 Sep 2020 12:47:13 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="huZ/i3eA" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 050D42158C Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-ID:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=VGFalcnWl/Z5Qwo3gxjXdPmv04F9pd+lpUFC9xj2IOQ=; b=huZ/i3eAG6RyEsgH4GvPeCjB8 axU3ArrkgqvfqDgB8AZVU+ZXJeHjgCOOxYD04JOcpRreBadsvBsVh/Jj0vg+fm47FvFIeR8xJV5tD Q/8RbgX94fGzs2bvHYBvVLIuRLLisr/bLIORcipUkAz7KSl4r6wGHIN7ZhNLk442++q8AJGI9dZR0 L7kamptjK5Zmkhn2DVA7s/kOmBf6eBnE3OiJ+5FGyXel8T0ZjLNj6v50/04D/t1bGNsT1hF8FMwDV smZXN7sqjVTc/9H5Uwa1DAukdG60skXqpKVgcI2YApxLU32cA8XnQ2AxrY+05d7G909yR4sGsYk/H XsWUCQNSA==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kJcF1-0007T8-F3; Sat, 19 Sep 2020 12:45:23 +0000 Received: from szxga07-in.huawei.com ([45.249.212.35] helo=huawei.com) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kJcEw-0007SX-Ml for linux-arm-kernel@lists.infradead.org; Sat, 19 Sep 2020 12:45:19 +0000 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id D81B814E6D6CAD530CEB; Sat, 19 Sep 2020 20:45:02 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.253) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.487.0; Sat, 19 Sep 2020 20:44:56 +0800 From: Zhen Lei To: devicetree , Daniel Lezcano , Thomas Gleixner , "Haojian Zhuang" , Andrew Morton , Russell King , Catalin Marinas , linux-arm-kernel , linux-kernel Subject: [PATCH 1/1] dt-bindings: sp804: add support for Hisilicon sp804 timer Date: Sat, 19 Sep 2020 20:44:12 +0800 Message-ID: <20200919124412.4135-2-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20200919124412.4135-1-thunder.leizhen@huawei.com> References: <20200919124412.4135-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.253] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200919_084519_008750_FB296127 X-CRM114-Status: GOOD ( 10.60 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kefeng Wang , Libin , Zhen Lei Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Some Hisilicon SoCs, such as Hi1212, use the Hisilicon extended sp804 timer. Signed-off-by: Zhen Lei --- Documentation/devicetree/bindings/timer/arm,sp804.yaml | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/timer/arm,sp804.yaml b/Documentation/devicetree/bindings/timer/arm,sp804.yaml index ba0945cf799ee0b..e35d3053250a557 100644 --- a/Documentation/devicetree/bindings/timer/arm,sp804.yaml +++ b/Documentation/devicetree/bindings/timer/arm,sp804.yaml @@ -15,19 +15,26 @@ description: |+ free-running mode. The input clock is shared, but can be gated and prescaled independently for each timer. + There is a viriant of Arm SP804: Hisilicon 64-bit SP804 timer. Some Hisilicon + SoCs, such as Hi1212, should use the dedicated compatible: "hisilicon,sp804". + # Need a custom select here or 'arm,primecell' will match on lots of nodes select: properties: compatible: contains: - const: arm,sp804 + oneOf: + - const: arm,sp804 + - const: hisilicon,sp804 required: - compatible properties: compatible: items: - - const: arm,sp804 + - enum: + - arm,sp804 + - hisilicon,sp804 - const: arm,primecell interrupts: -- 1.8.3 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel