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Received: from shell.armlinux.org.uk ([fd8f:7570:feb6:1:5054:ff:fe00:4ec]:35968) by pandora.armlinux.org.uk with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1kJvAO-0000TZ-RZ; Sun, 20 Sep 2020 09:57:52 +0100 Received: from linux by shell.armlinux.org.uk with local (Exim 4.92) (envelope-from ) id 1kJvAO-0000Bb-Fx; Sun, 20 Sep 2020 09:57:52 +0100 Date: Sun, 20 Sep 2020 09:57:52 +0100 From: Russell King - ARM Linux admin To: Ard Biesheuvel Subject: Re: [RFC/RFT PATCH 0/6] ARM: p2v: reduce min alignment to 2 MiB Message-ID: <20200920085752.GX1551@shell.armlinux.org.uk> References: <20200918103102.18107-1-ardb@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200920_045954_878272_55A490C8 X-CRM114-Status: GOOD ( 29.09 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-efi , Nicolas Pitre , Linus Walleij , Santosh Shilimkar , Zhen Lei , Linux ARM Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Sun, Sep 20, 2020 at 09:50:30AM +0200, Ard Biesheuvel wrote: > On Sun, 20 Sep 2020 at 01:49, Nicolas Pitre wrote: > > > > On Fri, 18 Sep 2020, Ard Biesheuvel wrote: > > > > > This series is inspired by Zhei Len's series [0], which updates the > > > ARM p2v patching code to optionally support p2v relative alignments > > > of as little as 64 KiB. > > > > > > Reducing this alignment is necessary for some specific Huawei boards, > > > but given that reducing this minimum alignment will make the boot > > > sequence more robust for all platforms, especially EFI boot, which > > > no longer relies on the 128 MB masking of the decompressor load address, > > > but uses firmware memory allocation routines to find a suitable spot > > > for the decompressed kernel. > > > > > > This series is not based on Zhei Len's code, but addresses the same > > > problem, and takes some feedback given in the review into account: > > > - use of a MOVW instruction to avoid two adds/adcs sequences when dealing > > > with the carry on LPAE > > > - add support for Thumb2 kernels as well > > > - make the change unconditional - it will bit rot otherwise, and has value > > > for other platforms as well. > > > > > > The first four patches are general cleanup and preparatory changes. > > > Patch #5 implements the switch to a MOVW instruction without changing > > > the minimum alignment. > > > Patch #6 reduces the minimum alignment to 2 MiB. > > > > > > Tested on QEMU in ARM/!LPAE, ARM/LPAE, Thumb2/!LPAE and Thumb2/LPAE modes. > > > > At this point I think this really ought to be split into a file of its > > own... and maybe even rewritten in C. Even though I wrote the original > > code, I no longer understand it without re-investing time into it. But > > in either cases the whole of head.S would need to have its registers > > shuffled first to move long lived values away from r0-r3,ip,lr to allow > > for standard function calls. > > > > I agree with that in principle, however, running C code with a stack > with the MMU off is slightly risky. It's more than "slightly". C code has literal addresses, which are raw virtual addresses. These are meaningless with the MMU off. I guess one could correct the various pointers the code would read, but you could not directly access any variable (as that involves dereferencing a virtual address stored in the function's literal pool.) -- RMK's Patch system: https://www.armlinux.org.uk/developer/patches/ FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last! _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel