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From: Will Deacon <will@kernel.org>
To: Alexandru Elisei <alexandru.elisei@arm.com>
Cc: mark.rutland@arm.com, sumit.garg@linaro.org,
	Julien Thierry <julien.thierry@arm.com>,
	maz@kernel.org, Will Deacon <will.deacon@arm.com>,
	linux-kernel@vger.kernel.org, swboyd@chromium.org,
	Julien Thierry <julien.thierry.kdev@gmail.com>,
	catalin.marinas@arm.com, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v6 6/7] arm_pmu: Introduce pmu_irq_ops
Date: Mon, 21 Sep 2020 14:55:11 +0100	[thread overview]
Message-ID: <20200921135510.GM2139@willie-the-truck> (raw)
In-Reply-To: <20200819133419.526889-7-alexandru.elisei@arm.com>

On Wed, Aug 19, 2020 at 02:34:18PM +0100, Alexandru Elisei wrote:
> From: Julien Thierry <julien.thierry@arm.com>
> 
> Currently the PMU interrupt can either be a normal irq or a percpu irq.
> Supporting NMI will introduce two cases for each existing one. It becomes
> a mess of 'if's when managing the interrupt.
> 
> Define sets of callbacks for operations commonly done on the interrupt. The
> appropriate set of callbacks is selected at interrupt request time and
> simplifies interrupt enabling/disabling and freeing.
> 
> Cc: Julien Thierry <julien.thierry.kdev@gmail.com>
> Cc: Will Deacon <will.deacon@arm.com>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Signed-off-by: Julien Thierry <julien.thierry@arm.com>
> Signed-off-by: Alexandru Elisei <alexandru.elisei@arm.com>
> ---
>  drivers/perf/arm_pmu.c | 86 ++++++++++++++++++++++++++++++++++--------
>  1 file changed, 70 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/perf/arm_pmu.c b/drivers/perf/arm_pmu.c
> index df352b334ea7..17e5952d21e4 100644
> --- a/drivers/perf/arm_pmu.c
> +++ b/drivers/perf/arm_pmu.c
> @@ -26,8 +26,46 @@
>  
>  #include <asm/irq_regs.h>
>  
> +static int armpmu_count_irq_users(const int irq);
> +
> +struct pmu_irq_ops {
> +	void (*enable_pmuirq)(unsigned int irq);
> +	void (*disable_pmuirq)(unsigned int irq);
> +	void (*free_pmuirq)(unsigned int irq, int cpu, void __percpu *devid);
> +};
> +
> +static void armpmu_free_pmuirq(unsigned int irq, int cpu, void __percpu *devid)
> +{
> +	free_irq(irq, per_cpu_ptr(devid, cpu));
> +}
> +
> +static const struct pmu_irq_ops pmuirq_ops = {
> +	.enable_pmuirq = enable_irq,
> +	.disable_pmuirq = disable_irq_nosync,
> +	.free_pmuirq = armpmu_free_pmuirq
> +};
> +
> +static void armpmu_enable_percpu_pmuirq(unsigned int irq)
> +{
> +	enable_percpu_irq(irq, IRQ_TYPE_NONE);
> +}
> +
> +static void armpmu_free_percpu_pmuirq(unsigned int irq, int cpu,
> +				   void __percpu *devid)
> +{
> +	if (armpmu_count_irq_users(irq) == 1)
> +		free_percpu_irq(irq, devid);
> +}
> +
> +static const struct pmu_irq_ops percpu_pmuirq_ops = {
> +	.enable_pmuirq = armpmu_enable_percpu_pmuirq,
> +	.disable_pmuirq = disable_percpu_irq,
> +	.free_pmuirq = armpmu_free_percpu_pmuirq
> +};
> +
>  static DEFINE_PER_CPU(struct arm_pmu *, cpu_armpmu);
>  static DEFINE_PER_CPU(int, cpu_irq);
> +static DEFINE_PER_CPU(const struct pmu_irq_ops *, cpu_irq_ops);

Would it make sense to put this in a structure alongside the irq?

>  
>  static inline u64 arm_pmu_event_max_period(struct perf_event *event)
>  {
> @@ -544,6 +582,19 @@ static int armpmu_count_irq_users(const int irq)
>  	return count;
>  }
>  
> +static const struct pmu_irq_ops *armpmu_find_irq_ops(int irq)
> +{
> +	int cpu;
> +
> +	for_each_possible_cpu(cpu) {
> +		if (per_cpu(cpu_irq, cpu) == irq
> +		    && per_cpu(cpu_irq_ops, cpu))
> +			return per_cpu(cpu_irq_ops, cpu);
> +	}

nit, but you could make this a bit more readable:

	struct pmu_irq_ops *ops = NULL;

	for_each_possible_cpu(cpu) {
		if (per_cpu(cpu_irq, cpu) != irq)
			continue;

		ops = per_cpu(cpu_irq_ops, cpu);
		if (ops)
			break;
	}

	return ops;

Will

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  reply	other threads:[~2020-09-21 13:56 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-19 13:34 [PATCH v6 0/7] arm_pmu: Use NMI for perf interrupt Alexandru Elisei
2020-08-19 13:34 ` [PATCH v6 1/7] arm64: perf: Add missing ISB in armv8pmu_enable_event() Alexandru Elisei
2020-08-19 13:34 ` [PATCH v6 2/7] arm64: perf: Avoid PMXEV* indirection Alexandru Elisei
2020-09-21 13:43   ` Will Deacon
2020-08-19 13:34 ` [PATCH v6 3/7] arm64: perf: Remove PMU locking Alexandru Elisei
2020-08-19 13:34 ` [PATCH v6 4/7] arm64: perf: Defer irq_work to IPI_IRQ_WORK Alexandru Elisei
2020-08-19 14:23   ` peterz
2020-08-19 13:34 ` [PATCH v6 5/7] KVM: arm64: pmu: Make overflow handler NMI safe Alexandru Elisei
2020-09-21 13:43   ` Will Deacon
2020-09-21 15:45     ` Alexandru Elisei
2020-08-19 13:34 ` [PATCH v6 6/7] arm_pmu: Introduce pmu_irq_ops Alexandru Elisei
2020-09-21 13:55   ` Will Deacon [this message]
2020-09-23 15:46     ` Alexandru Elisei
2020-08-19 13:34 ` [PATCH v6 7/7] arm_pmu: arm64: Use NMIs for PMU Alexandru Elisei
2020-09-04  8:58 ` [PATCH v6 0/7] arm_pmu: Use NMI for perf interrupt Sumit Garg
2020-09-21 13:59 ` Will Deacon
2020-09-21 15:41   ` Alexandru Elisei
2020-09-21 17:53     ` Will Deacon
2020-09-22 16:30     ` Alexandru Elisei

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