From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2785EC43466 for ; Mon, 21 Sep 2020 16:32:07 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C1E07235F9 for ; Mon, 21 Sep 2020 16:32:06 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="w3YmemPy" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C1E07235F9 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=FtrWF++CzczNnKr/tT0t/+Re7F/dm78pYlegyUjmntc=; b=w3YmemPyHq+IaclonqJAxlE4g 43EEhEAl9k3pxYw8ey4ycLRAa6skw/qfmz6s+TZEObiFntvs7CYcA8ck/9wXg7qcEar4cPz1zuDDL MmJEDqfZrGuSBbZ8J5CWLunahX1A0ZK/nBuMO+yH2kXk2zCbdAXfWxcJn/0IhV2NFhzPpzOMVds/g bTlxVAFWA/wLg1qGuNux3akqj/tvRPwIpzST600BWfUBB5cf+/UW7bM3AgiTFf8i/2isIa7NMfakB pD1qRty7rZVSEg2hj8pxnmaV29JizUzJJIiEmzvplQNoBBcBnQiNhzn3ImkUi0PdfZtUlMg0hhOl7 i3PYOKA/A==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kKOiB-00080a-EP; Mon, 21 Sep 2020 16:30:43 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kKOi8-0007zK-4y for linux-arm-kernel@lists.infradead.org; Mon, 21 Sep 2020 16:30:41 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 321F21045; Mon, 21 Sep 2020 09:30:36 -0700 (PDT) Received: from C02TD0UTHF1T.local (unknown [10.57.16.225]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 295463F73B; Mon, 21 Sep 2020 09:30:34 -0700 (PDT) Date: Mon, 21 Sep 2020 17:30:26 +0100 From: Mark Rutland To: linux-arm-kernel@lists.infradead.org, Will Deacon Subject: Re: [PATCH] arm64: initialize per-cpu offsets earlier Message-ID: <20200921163026.GA43755@C02TD0UTHF1T.local> References: <20200730163806.23053-1-mark.rutland@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200730163806.23053-1-mark.rutland@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200921_123040_282199_9124F898 X-CRM114-Status: GOOD ( 32.34 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Catalin Marinas , James Morse Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Will, Would you be happy to pick up the below patch, or would you like me to resend with the commit message typos fixed? I need to do some more work to enable KCSAN, but taking this would help to get things out of the way. Mark. On Thu, Jul 30, 2020 at 05:38:06PM +0100, Mark Rutland wrote: > Our contemporary initialization of the per-cpu offset register is > somehat difficult to follow, and this initialization is not always early > enough for upcoming instrumentation with KCSAN, where the > instrumentation handling functions use the per-cpu offset. > > To make it possible to support KCSAN, and to simplify reasoning about > early bringup code, let's initialize the percpu offset earlier, before > we run any C code that may use the per-cpu offset. To do so, this poatch > adds a new init_this_cpu_offset() helpers that's called before the usual > primary/secondary start functions. For consistency, this is also used to > re-initialize the per-cpu offset after the runtime per-cpu areas have > been allocated (which can change CPU0's offset). > > So that init_this_cpu_offset() isn't subject to any instrumentation that > might consume the per-cpu offset, it is marked with noinstr, preventing > instrumentation. > > Signed-off-by: Mark Rutland > Cc: Catalin Marinas > Cc: James Morse > Cc: Will Deacon > --- > arch/arm64/include/asm/cpu.h | 2 ++ > arch/arm64/kernel/head.S | 3 +++ > arch/arm64/kernel/setup.c | 12 ++++++------ > arch/arm64/kernel/smp.c | 13 ++++++++----- > 4 files changed, 19 insertions(+), 11 deletions(-) > > This is a preparatory cleanup for KCSAN, but given it should make per-cpu more > generally robust I thought it was worth sending on its own now. I've given this > some light SMP testing in a KVM guest. > > Mark. > > diff --git a/arch/arm64/include/asm/cpu.h b/arch/arm64/include/asm/cpu.h > index 7faae6ff3ab4d..d9d60b18e8116 100644 > --- a/arch/arm64/include/asm/cpu.h > +++ b/arch/arm64/include/asm/cpu.h > @@ -68,4 +68,6 @@ void __init init_cpu_features(struct cpuinfo_arm64 *info); > void update_cpu_features(int cpu, struct cpuinfo_arm64 *info, > struct cpuinfo_arm64 *boot); > > +void init_this_cpu_offset(void); > + > #endif /* __ASM_CPU_H */ > diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S > index 037421c66b147..2720e6ec68140 100644 > --- a/arch/arm64/kernel/head.S > +++ b/arch/arm64/kernel/head.S > @@ -452,6 +452,8 @@ SYM_FUNC_START_LOCAL(__primary_switched) > bl __pi_memset > dsb ishst // Make zero page visible to PTW > > + bl init_this_cpu_offset > + > #ifdef CONFIG_KASAN > bl kasan_early_init > #endif > @@ -758,6 +760,7 @@ SYM_FUNC_START_LOCAL(__secondary_switched) > ptrauth_keys_init_cpu x2, x3, x4, x5 > #endif > > + bl init_this_cpu_offset > b secondary_start_kernel > SYM_FUNC_END(__secondary_switched) > > diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c > index c793276ec7ad9..c317293435328 100644 > --- a/arch/arm64/kernel/setup.c > +++ b/arch/arm64/kernel/setup.c > @@ -87,12 +87,6 @@ void __init smp_setup_processor_id(void) > u64 mpidr = read_cpuid_mpidr() & MPIDR_HWID_BITMASK; > cpu_logical_map(0) = mpidr; > > - /* > - * clear __my_cpu_offset on boot CPU to avoid hang caused by > - * using percpu variable early, for example, lockdep will > - * access percpu variable inside lock_release > - */ > - set_my_cpu_offset(0); > pr_info("Booting Linux on physical CPU 0x%010lx [0x%08x]\n", > (unsigned long)mpidr, read_cpuid_id()); > } > @@ -276,6 +270,12 @@ arch_initcall(reserve_memblock_reserved_regions); > > u64 __cpu_logical_map[NR_CPUS] = { [0 ... NR_CPUS-1] = INVALID_HWID }; > > +void noinstr init_this_cpu_offset(void) > +{ > + unsigned int cpu = task_cpu(current); > + set_my_cpu_offset(per_cpu_offset(cpu)); > +} > + > void __init setup_arch(char **cmdline_p) > { > init_mm.start_code = (unsigned long) _text; > diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c > index e43a8ff19f0f6..5c507597e4094 100644 > --- a/arch/arm64/kernel/smp.c > +++ b/arch/arm64/kernel/smp.c > @@ -193,10 +193,7 @@ asmlinkage notrace void secondary_start_kernel(void) > u64 mpidr = read_cpuid_mpidr() & MPIDR_HWID_BITMASK; > struct mm_struct *mm = &init_mm; > const struct cpu_operations *ops; > - unsigned int cpu; > - > - cpu = task_cpu(current); > - set_my_cpu_offset(per_cpu_offset(cpu)); > + unsigned int cpu = smp_processor_id(); > > /* > * All kernel threads share the same mm context; grab a > @@ -436,7 +433,13 @@ void __init smp_cpus_done(unsigned int max_cpus) > > void __init smp_prepare_boot_cpu(void) > { > - set_my_cpu_offset(per_cpu_offset(smp_processor_id())); > + /* > + * Now that setup_per_cpu_areas() has allocated the runtime per-cpu > + * areas it is only safe to read the CPU0 boot-time area, and we must > + * reinitialize the offset to point to the runtime area. > + */ > + init_this_cpu_offset(); > + > cpuinfo_store_boot_cpu(); > > /* > -- > 2.11.0 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel