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Kristensen" , freedreno@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Sep 21, 2020 at 11:03:49PM +0100, Robin Murphy wrote: > On 2020-09-21 19:03, Will Deacon wrote: > > On Fri, Sep 11, 2020 at 07:57:18PM +0530, Sai Prakash Ranjan wrote: > > > Add a quirk IO_PGTABLE_QUIRK_SYS_CACHE to override the > > > attributes set in TCR for the page table walker when > > > using system cache. > > > > I wonder if the panfrost folks can reuse this for the issue discussed > > over at: > > > > https://lore.kernel.org/r/cover.1600213517.git.robin.murphy@arm.com > > Isn't this all hinged around the outer cacheability attribute, rather than > shareability (since these are nominally NC mappings and thus already > properly Osh)? The Panfrost issue is just about shareability domains being a > bit wonky; the cacheability attributes there are actually reasonably normal > (other than not having a non-cacheable type at all, only a choice of > allocation policies...) Hmm, yes, this quirk _also_ changes the cacheability settings which isn't what we need. It's a bit grotty having two different ways to configure these TCR bits (i.e. a quirk and a format), but at least the mali format rejects all of the quirks so I suppose it's not the end of the world. Will _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel