From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E300BC2D0E2 for ; Tue, 22 Sep 2020 10:14:44 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5593C238D6 for ; Tue, 22 Sep 2020 10:14:44 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="z4DcxOTT" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5593C238D6 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:MIME-Version:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:In-Reply-To:References:List-Owner; bh=+nDU+wa7IWnHhW7bBM7KZFAhkdFLrDTBSS4aib6QeCE=; b=z4DcxOTTNnq0Ad6n8snOY3qHEx vZcY/K0VToJPXhSCSUGg5chmdMnQ9iac/6m1L5dpy5A8QCWkGdb2/7VXX7i1MfLxr29J8WcAHeUJt xRX0/uOmPH/NQ6ZRXUtVIr1Y8sEv3mvkYpY6YKRQn2+tt4n1GQhmty6aDsZX9Mv9f32v5qexpq64Z 84FBMHdnQYWSJbsmQOanwRnAEjTx3IzAjQzqSU/1s6TkgW51/OnPKcYw9MoH/gPwZ/l2NBDUV+S3R l+9qD1bGxsLimrhNw7qPcuBIQFIn3U5Ur8JBXwm3u07QX0HrWtNByRvHLEbY9wX1qg+mTtVq5x09Q Q03fJoMQ==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kKfHv-0006VH-HH; Tue, 22 Sep 2020 10:12:45 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kKfHo-0006SZ-2j for linux-arm-kernel@lists.infradead.org; Tue, 22 Sep 2020 10:12:36 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E60E0D6E; Tue, 22 Sep 2020 03:12:31 -0700 (PDT) Received: from donnerap.arm.com (donnerap.cambridge.arm.com [10.1.195.35]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id DAF253F718; Tue, 22 Sep 2020 03:12:29 -0700 (PDT) From: Andre Przywara To: Will Deacon , Catalin Marinas , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo Subject: [PATCH 0/5] perf: arm64: Support ARMv8.3-SPE extensions Date: Tue, 22 Sep 2020 11:12:20 +0100 Message-Id: <20200922101225.183554-1-andre.przywara@arm.com> X-Mailer: git-send-email 2.17.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200922_061236_197557_2BD78245 X-CRM114-Status: UNSURE ( 9.10 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Suzuki K Poulose , Alexander Shishkin , linux-kernel@vger.kernel.org, James Clark , Leo Yan , Namhyung Kim , Jiri Olsa , Tan Xiaojun , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The "ARMv8.3-SPE extensions" add some bits to SPE to cover newer architecture features, most prominently SVE. Add the new bits where needed, mostly to perf's SPE packet decoder. Cheers, Andre Andre Przywara (5): arm64: spe: Allow new bits in SPE filter register perf: arm_spe: Add new event packet bits perf: arm_spe: Add nested virt event decoding perf: arm_spe: Decode memory tagging properties perf: arm_spe: Decode SVE events arch/arm64/include/asm/sysreg.h | 2 +- .../arm-spe-decoder/arm-spe-pkt-decoder.c | 86 +++++++++++++++++-- 2 files changed, 81 insertions(+), 7 deletions(-) -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel