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Tue, 22 Sep 2020 16:41:36 -0700 (PDT) Received: from xps15 ([64.188.179.253]) by smtp.gmail.com with ESMTPSA id s2sm9943894ili.49.2020.09.22.16.41.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Sep 2020 16:41:36 -0700 (PDT) Received: (nullmailer pid 3489380 invoked by uid 1000); Tue, 22 Sep 2020 23:41:34 -0000 Date: Tue, 22 Sep 2020 17:41:34 -0600 From: Rob Herring To: Lokesh Vutla Subject: Re: [PATCH v4 3/5] dt-bindings: arm: ti: Add bindings for J7200 SoC Message-ID: <20200922234134.GA3489252@bogus> References: <20200914162231.2535-1-lokeshvutla@ti.com> <20200914162231.2535-4-lokeshvutla@ti.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200914162231.2535-4-lokeshvutla@ti.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200922_194137_416384_ED6A83DA X-CRM114-Status: GOOD ( 14.94 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Nishanth Menon , Device Tree Mailing List , Grygorii Strashko , Sekhar Nori , Kishon Vijay Abraham I , Tero Kristo , Rob Herring , Linux ARM Mailing List Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, 14 Sep 2020 21:52:29 +0530, Lokesh Vutla wrote: > The J7200 SoC is a part of the K3 Multicore SoC architecture platform. > It is targeted for automotive gateway, vehicle compute systems, > Vehicle-to-Vehicle (V2V) and Vehicle-to-Everything (V2X) applications. > The SoC aims to meet the complex processing needs of modern embedded > products. > > Some highlights of this SoC are: > * Dual Cortex-A72s in a single cluster, two clusters of lockstep > capable dual Cortex-R5F MCUs and a Centralized Device Management and > Security Controller (DMSC). > * Configurable L3 Cache and IO-coherent architecture with high data > throughput capable distributed DMA architecture under NAVSS. > * Integrated Ethernet switch supporting up to a total of 4 external ports > in addition to legacy Ethernet switch of up to 2 ports. > * Upto 1 PCIe-GEN3 controller, 1 USB3.0 Dual-role device subsystems, > 20 MCANs, 3 McASP, eMMC and SD, OSPI/HyperBus memory controller, I3C and > I2C, eCAP/eQEP, eHRPWM among other peripherals. > * One hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL > management. > > See J7200 Technical Reference Manual (SPRUIU1, June 2020) > for further details: https://www.ti.com/lit/pdf/spruiu1 > > Reviewed-by: Grygorii Strashko > Signed-off-by: Lokesh Vutla > --- > Documentation/devicetree/bindings/arm/ti/k3.yaml | 4 ++++ > 1 file changed, 4 insertions(+) > Reviewed-by: Rob Herring _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel