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Venkataraman" Subject: Re: [PATCH v2 0/4] [RFC] Implement Trampoline File Descriptor Message-ID: <20200923195147.GA1358246@rani.riverdale.lan> References: <20200916150826.5990-1-madvenka@linux.microsoft.com> <87v9gdz01h.fsf@mid.deneb.enyo.de> <96ea02df-4154-5888-1669-f3beeed60b33@linux.microsoft.com> <20200923014616.GA1216401@rani.riverdale.lan> <20200923091125.GB1240819@rani.riverdale.lan> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200923_155152_464554_F6AE92C2 X-CRM114-Status: GOOD ( 22.51 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, linux-security-module@vger.kernel.org, pavel@ucw.cz, kernel-hardening@lists.openwall.com, linux-api@vger.kernel.org, x86@kernel.org, linux-kernel@vger.kernel.org, oleg@redhat.com, mic@digikod.net, Arvind Sankar , Florian Weimer , luto@kernel.org, linux-fsdevel@vger.kernel.org, linux-integrity@vger.kernel.org, David.Laight@ACULAB.COM, libffi-discuss@sourceware.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Sep 23, 2020 at 02:17:30PM -0500, Madhavan T. Venkataraman wrote: > > > On 9/23/20 4:11 AM, Arvind Sankar wrote: > > For libffi, I think the proposed standard trampoline won't actually > > work, because not all ABIs have two scratch registers available to use > > as code_reg and data_reg. Eg i386 fastcall only has one, and register > > has zero scratch registers. I believe 32-bit ARM only has one scratch > > register as well. > > The trampoline is invoked as a function call in the libffi case. Any > caller saved register can be used as code_reg, can it not? And the > scratch register is needed only to jump to the code. After that, it > can be reused for any other purpose. > > However, for ARM, you are quite correct. There is only one scratch > register. This means that I have to provide two types of trampolines: > > - If an architecture has enough scratch registers, use the currently > defined trampoline. > > - If the architecture has only one scratch register, but has PC-relative > data references, then embed the code address at the bottom of the > trampoline and access it using PC-relative addressing. > > Thanks for pointing this out. > > Madhavan libffi is trying to provide closures with non-standard ABIs as well: the actual user function is standard ABI, but the closure can be called with a different ABI. If the closure was created with FFI_REGISTER abi, there are no registers available for the trampoline to use: EAX, EDX and ECX contain the first three arguments of the function, and every other register is callee-save. I provided a sample of the kind of trampoline that would be needed in this case -- it's position-independent and doesn't clobber any registers at all, and you get 255 trampolines per page. If I take another 16-byte slot out of the page for the end trampoline that does the actual work, I'm sure I could even come up with one that can just call a normal C function, only the return might need special handling depending on the return type. And again, do you actually have any example of an architecture that cannot run position-independent code? PC-relative addressing is an implementation detail: the fact that it's available for x86_64 but not for i386 just makes position-independent code more cumbersome on i386, but it doesn't make it impossible. For the tiny trampolines here, it makes almost no difference. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel