From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.4 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F276BC2D0A8 for ; Sun, 27 Sep 2020 02:53:23 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 97C62238E6 for ; Sun, 27 Sep 2020 02:53:23 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="ZvYbM1qI"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="X3XVke9M" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 97C62238E6 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=RzCz/3tWFeyIV3htpoKwOHhnwPLX3DyYCC+e1Y+aVuk=; b=ZvYbM1qIGbKF46eIOX9a6QHFD Ue3VZQNFbO01zk6V3wabh4BLbP5PpwXWGrk3W/uDcBfY6mdGBrTjOawZHQGbabDqEADqDm9hmWmuh pxlC4dmKZBzd6IDvJRmMYSr7plrE5A+cHi/jgqTEcHx66Fd9gCPAmMHqMCizpveYJ1Crq+y1HD+1G nCajDUyjpy/aLEA3lp1o+XDO2qUiTWhVeOatqaTiNEjhJpfT/X7qXhNR8kCKfiaybADrh6XHppG3I rbTiE4Z3dQfvupfDQOi+0rCFH34IB94u6LlDjOxMXFALkbAWr9PXaqCK25Q/4rVt1gIY3szVd22fQ Asrs4dBgg==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kMMn8-0001rg-W1; Sun, 27 Sep 2020 02:51:59 +0000 Received: from mail-pj1-x1043.google.com ([2607:f8b0:4864:20::1043]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kMMn5-0001qH-4v for linux-arm-kernel@lists.infradead.org; Sun, 27 Sep 2020 02:51:56 +0000 Received: by mail-pj1-x1043.google.com with SMTP id q4so1591023pjh.5 for ; Sat, 26 Sep 2020 19:51:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=PkAAsu9JWaPIy4rXDra5c7KbxJzhKhciubTYNKP7SJQ=; b=X3XVke9M9xzMzweyyrCMSQr7PN9p6RUAp0C1erhi3J6GurrDA46xMZYlz23WTZtmLQ jObFtM4QSskC6TM+HhRgdRus+sWZOwA+o4YQOB1xdmeJwNZ+G84Vi87ePmyIL4whEe/G Y7GvrQrUGwVpUpJSaFByc+KIbj4BGX7fpwPk7X8d5EXIuQo40GAKZ9kf5D3pt/8llJZV 91NvLBU7rYY8OH8rL4XUKem5L1CFMKFm+R12YtWbkmrLKwYS2rA7O70aNXAAEroP/Gfr AoHkE3SqdHV/HZO4hUkYF/pOg5J0TWo+qqx4d0cJToasbEKSedLHXznM0qH6gpOp9sl6 B/8w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=PkAAsu9JWaPIy4rXDra5c7KbxJzhKhciubTYNKP7SJQ=; b=auJObwn5Lxth5XzC+mD/5zAgtX4eqNiiEH+U14N8Px9N8lHb+d9o3EA/GFAoOWinXN TuFoTBmYUHmSB05xBbtOa97Zf1kf+/rAFe4Rk9SkJlPkCn55Akt2MDF+7opTxc6B5flc wpMC3bSuGhVofvTQ9+329mG+OYRwHbtVj/fn/rCEwDJ2Qi0uFhyvz+eFyNOUVaCyguc4 ehX8+wRKmt56Hy9s8mgzIEa1WoTLH3CVJ+k6gI/rP71h4tIbefv5N5TJI13JQnOb26zv cz67mr8YWDa5OyOnO98eSLpEVS84zF7Fa8cCTKh5pKAhzfLhoNS/NyzNNiTNmK05Pen+ GZbA== X-Gm-Message-State: AOAM530fE8yzlC0jyS2KvT0DZrkLgj9dMypewhS9pdBYOlS1UrQbDTJ4 EBvq5qRHEN3NSlWWypkbdN68rA== X-Google-Smtp-Source: ABdhPJy5NdnjbH2xU3SziiypDNUc+Uxuq0VvTsDhXW+7TIkBONWXyJ/Ho3tC5K53opZPddkT+/XKPw== X-Received: by 2002:a17:90b:889:: with SMTP id bj9mr4069151pjb.101.1601175111415; Sat, 26 Sep 2020 19:51:51 -0700 (PDT) Received: from leoy-ThinkPad-X240s ([2600:3c01::f03c:91ff:fe8a:bb03]) by smtp.gmail.com with ESMTPSA id o20sm6225153pgh.63.2020.09.26.19.51.46 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sat, 26 Sep 2020 19:51:50 -0700 (PDT) Date: Sun, 27 Sep 2020 10:51:43 +0800 From: Leo Yan To: Andre Przywara Subject: Re: [PATCH 1/5] arm64: spe: Allow new bits in SPE filter register Message-ID: <20200927025143.GA9677@leoy-ThinkPad-X240s> References: <20200922101225.183554-1-andre.przywara@arm.com> <20200922101225.183554-2-andre.przywara@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200922101225.183554-2-andre.przywara@arm.com> User-Agent: Mutt/1.9.4 (2018-02-28) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200926_225155_499201_52442A66 X-CRM114-Status: GOOD ( 20.20 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Suzuki K Poulose , Peter Zijlstra , Catalin Marinas , Jiri Olsa , linux-kernel@vger.kernel.org, Arnaldo Carvalho de Melo , Alexander Shishkin , Ingo Molnar , James Clark , Namhyung Kim , Will Deacon , Tan Xiaojun , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Andre, On Tue, Sep 22, 2020 at 11:12:21AM +0100, Andre Przywara wrote: > The ARMv8.3-SPE extension adds some new bits for the event filter. > > Remove bits 11, 17 and 18 from the RES0 mask, so they can be used > correctly. > > Signed-off-by: Andre Przywara > --- > arch/arm64/include/asm/sysreg.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h > index 554a7e8ecb07..efca4ee28671 100644 > --- a/arch/arm64/include/asm/sysreg.h > +++ b/arch/arm64/include/asm/sysreg.h > @@ -281,7 +281,7 @@ > #define SYS_PMSFCR_EL1_ST_SHIFT 18 > > #define SYS_PMSEVFR_EL1 sys_reg(3, 0, 9, 9, 5) > -#define SYS_PMSEVFR_EL1_RES0 0x0000ffff00ff0f55UL > +#define SYS_PMSEVFR_EL1_RES0 0x0000ffff00f90755UL This patch is duplicate with Wei Li's patch [1]. You could see there have some discussion and Will gave suggestions [2] for the patch, this would be a good start point to continue this work. Thanks, Leo [1] https://www.spinics.net/lists/arm-kernel/msg825364.html [2] https://www.spinics.net/lists/arm-kernel/msg835733.html > > #define SYS_PMSLATFR_EL1 sys_reg(3, 0, 9, 9, 6) > #define SYS_PMSLATFR_EL1_MINLAT_SHIFT 0 > -- > 2.17.1 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel