From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0E76BC4727E for ; Mon, 28 Sep 2020 07:24:42 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9E2042080A for ; Mon, 28 Sep 2020 07:24:41 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="auv12TYI" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9E2042080A Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=lst.de Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=e8fjzITpyOle4SH3A0abc69BSRSNBFmgu0KH5XrjyYo=; b=auv12TYIexI5yKiSubFTp8gPT Lbqt/x8t3is7olPcMdJmttcvNfXzXh4QVF+EJ2Wlv9tewv/xfWOa+5syX0KDJifFF9ZmE0QMVC1Hq SyetF1MAr1CDmnfI/IlmDC6jzQs0JRJHTUYUmtDae1EwIfcovtEaT/A/6mRapkjcMaUcHfWxBM0a+ k8fhhwrF1mSxfPi2kFh2JZYJQ3LzBMcmgEVuKPxEDzBBT+78GC5NTLNeXu+/K0eiciAGtW3W6uEr3 nAXa87gx/+ColcKOH3T4T79mk9UqgtZEELx1ZK6geoeGJqG+d6xiDVDL71Nr6nghNFyMXJePoQ8Kg Aui+7T1Qw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kMnVH-00048R-OC; Mon, 28 Sep 2020 07:23:19 +0000 Received: from verein.lst.de ([213.95.11.211]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kMnVG-000481-3Q for linux-arm-kernel@lists.infradead.org; Mon, 28 Sep 2020 07:23:19 +0000 Received: by verein.lst.de (Postfix, from userid 2407) id 72B6A68AFE; Mon, 28 Sep 2020 09:23:15 +0200 (CEST) Date: Mon, 28 Sep 2020 09:23:15 +0200 From: Christoph Hellwig To: Mark Rutland Subject: Re: [PATCH 00/13] arm64: remove set_fs() and friends Message-ID: <20200928072315.GA16416@lst.de> References: <20200925160722.27155-1-mark.rutland@arm.com> <20200928071601.GA16212@lst.de> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200928071601.GA16212@lst.de> User-Agent: Mutt/1.5.17 (2007-11-01) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200928_032318_355527_83C9F22C X-CRM114-Status: GOOD ( 30.62 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: catalin.marinas@arm.com, robin.murphy@arm.com, james.morse@arm.com, will@kernel.org, hch@lst.de, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Sep 28, 2020 at 09:16:01AM +0200, Christoph Hellwig wrote: > On Fri, Sep 25, 2020 at 05:07:09PM +0100, Mark Rutland wrote: > > This series removes set_fs() from arm64, building atop the core rework > > done by Christophe. The series can be found in my arm64/set_fs-removal > > branch [2]. > > > > The bulk of the rework is to address the way we manipulate PAN and UAO, > > which is largely rendered redundant. > > > > The kernel maccess routines (__{get,put}_kernel_nofault) are trivial > > wrappers which share code with the uaccess routines, so I expect these > > should just work, but they'll need testing in-context, especially where > > they're wrapped by the gerneric copy routines. > > > > So far this has seen some very basic boot testing. I intend to throw > > Syzkaller and LTP at this soon. > > I'm not a an arm64 experts, but this looks reasonable to me. > > Also can't we remove all the remaining UAO handling as in the patch > below or did I totally misunderstood how uaccess works for arm64? Actually the patch was incomplete, here is the full one: diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 6d232837cbeee8..dd3c8f8a34dae2 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -1434,27 +1434,6 @@ endmenu menu "ARMv8.2 architectural features" -config ARM64_UAO - bool "Enable support for User Access Override (UAO)" - default y - help - User Access Override (UAO; part of the ARMv8.2 Extensions) - causes the 'unprivileged' variant of the load/store instructions to - be overridden to be privileged. - - This option changes get_user() and friends to use the 'unprivileged' - variant of the load/store instructions. This ensures that user-space - really did have access to the supplied memory. When addr_limit is - set to kernel memory the UAO bit will be set, allowing privileged - access to kernel memory. - - Choosing this option will cause copy_to_user() et al to use user-space - memory permissions. - - The feature is detected at runtime, the kernel will use the - regular load/store instructions if the cpu does not implement the - feature. - config ARM64_PMEM bool "Enable support for persistent memory" select ARCH_HAS_PMEM_API diff --git a/arch/arm64/include/asm/uaccess.h b/arch/arm64/include/asm/uaccess.h index ef2d5a90e1815f..1c16e43f035a7a 100644 --- a/arch/arm64/include/asm/uaccess.h +++ b/arch/arm64/include/asm/uaccess.h @@ -29,7 +29,6 @@ static inline void init_hw_uaccess_state(void) { asm(ALTERNATIVE("nop", SET_PSTATE_PAN(1), ARM64_HAS_PAN)); - asm(ALTERNATIVE("nop", SET_PSTATE_UAO(0), ARM64_HAS_UAO)); } /* diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index 9ca8144f1e6a45..c460cd15dc49b3 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -153,9 +153,6 @@ EXPORT_SYMBOL(cpu_hwcap_keys); } /* meta feature for alternatives */ -static bool __maybe_unused -cpufeature_pan_not_uao(const struct arm64_cpu_capabilities *entry, int __unused); - static void cpu_enable_cnp(struct arm64_cpu_capabilities const *cap); static bool __system_matches_cap(unsigned int n); @@ -1763,17 +1760,6 @@ static const struct arm64_cpu_capabilities arm64_features[] = { .type = ARM64_CPUCAP_WEAK_LOCAL_CPU_FEATURE, .matches = has_no_hw_prefetch, }, -#ifdef CONFIG_ARM64_UAO - { - .desc = "User Access Override", - .capability = ARM64_HAS_UAO, - .type = ARM64_CPUCAP_SYSTEM_FEATURE, - .matches = has_cpuid_feature, - .sys_reg = SYS_ID_AA64MMFR2_EL1, - .field_pos = ID_AA64MMFR2_UAO_SHIFT, - .min_field_value = 1, - }, -#endif /* CONFIG_ARM64_UAO */ #ifdef CONFIG_ARM64_VHE { .desc = "Virtualization Host Extensions", @@ -2701,12 +2687,6 @@ void __init setup_cpu_features(void) ARCH_DMA_MINALIGN); } -static bool __maybe_unused -cpufeature_pan_not_uao(const struct arm64_cpu_capabilities *entry, int __unused) -{ - return (__system_matches_cap(ARM64_HAS_PAN) && !__system_matches_cap(ARM64_HAS_UAO)); -} - static void __maybe_unused cpu_enable_cnp(struct arm64_cpu_capabilities const *cap) { cpu_replace_ttbr1(lm_alias(swapper_pg_dir)); diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c index 6ec12f4cb546f4..f223d27d991b3c 100644 --- a/arch/arm64/kernel/process.c +++ b/arch/arm64/kernel/process.c @@ -239,7 +239,7 @@ static void print_pstate(struct pt_regs *regs) const char *btype_str = btypes[(pstate & PSR_BTYPE_MASK) >> PSR_BTYPE_SHIFT]; - printk("pstate: %08llx (%c%c%c%c %c%c%c%c %cPAN %cUAO BTYPE=%s)\n", + printk("pstate: %08llx (%c%c%c%c %c%c%c%c %cPAN BTYPE=%s)\n", pstate, pstate & PSR_N_BIT ? 'N' : 'n', pstate & PSR_Z_BIT ? 'Z' : 'z', @@ -250,7 +250,6 @@ static void print_pstate(struct pt_regs *regs) pstate & PSR_I_BIT ? 'I' : 'i', pstate & PSR_F_BIT ? 'F' : 'f', pstate & PSR_PAN_BIT ? '+' : '-', - pstate & PSR_UAO_BIT ? '+' : '-', btype_str); } } @@ -417,10 +416,6 @@ int copy_thread(unsigned long clone_flags, unsigned long stack_start, } else { memset(childregs, 0, sizeof(struct pt_regs)); childregs->pstate = PSR_MODE_EL1h; - if (IS_ENABLED(CONFIG_ARM64_UAO) && - cpus_have_const_cap(ARM64_HAS_UAO)) - childregs->pstate |= PSR_UAO_BIT; - if (arm64_get_ssbd_state() == ARM64_SSBD_FORCE_DISABLE) set_ssbs_bit(childregs); _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel