From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.7 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A4162C47420 for ; Mon, 28 Sep 2020 19:14:48 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2196220717 for ; Mon, 28 Sep 2020 19:14:48 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="swLoILhf" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2196220717 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=vnPbJOzaNT/Fbuw6ZMpnt9vNM/mXZN67WOWJSlTff6U=; b=swLoILhfdYmG9IkCcM66m6M5b iS2SP1b9GWZznT5NfAZLzUxtWUoSdO9SraMezsGQms4XWHLQEM4nZfbM5IpanOx02z3cEaeBES6vo J2rYVYyCRwkieInNbqyM8QeiU1TM1iCnO1ZXXjt4NE0eNFZ8XV0edUVkSiekUnvjQg0nyyidvm7Di o+vzoO1v8RnTX5CvNZ9Wx3durlEdpR2LVi1Sb91GY7YgnvrWTA/tE69euhKUO9JwN8rd5jOKe0ifh jTQCG6ofhnD1J6d79l6cpLA4VYCfhXXbAP86Pd6cowUOIuAJ53PZOCgPsllzr3LWTO0n19w5yugC+ vf2LhQTcg==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kMyaJ-0003rN-J4; Mon, 28 Sep 2020 19:13:15 +0000 Received: from mail-ot1-f67.google.com ([209.85.210.67]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kMyaG-0003qz-O2 for linux-arm-kernel@lists.infradead.org; Mon, 28 Sep 2020 19:13:13 +0000 Received: by mail-ot1-f67.google.com with SMTP id u25so2049756otq.6 for ; Mon, 28 Sep 2020 12:13:12 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=sBMT/yUJssHKk30uHEKtfVPd8t01wzuCOlJvqJUVDFo=; b=Ctbzn2wieQvDt+doHl3CS6nyBdwlpXsgI838i6d4tCWW74bY6ZhFc+6snd+YYev6XP VWlnkKMzUD+/bFAxX52akYMAEJPAuG4sIKgMjyZVIrfZGjOleom4y4VNFW+jHSifRRRv yG9Q1TiPsUcpFlgr049O1qswS9yyaGJlzLE9BlI2hY3B4dsYK3e9elxIZAO6b14GrTag VvQ4vtfLGZ024lekteSOfCGPboKZZbGuMJ1bmPKZdeMPbRuJJ97S4oirAtgy4SLTYft/ SUzPcV4sCfTsr7+W5bpmSDB//xpNJnPMJiDoCIC2SqmPSG4yVWCn2jtfA9tLAQQCysu9 sjvQ== X-Gm-Message-State: AOAM532MjcYTXfjkQcJftoIxMZkO0BcItefionvYYF6q6ICj5clEyclC EZq/G3Pem1S6ArMqCLQPrcT2f3GPmXqc X-Google-Smtp-Source: ABdhPJwm2EYYzEys43w40LdHFEFgciuLJQIsljPpYkmA9Mw/wXozl8cZIqIxREyfoWc1Y71iJpclZg== X-Received: by 2002:a05:6830:ca:: with SMTP id x10mr303561oto.344.1601320391804; Mon, 28 Sep 2020 12:13:11 -0700 (PDT) Received: from xps15 (24-155-109-49.dyn.grandenetworks.net. [24.155.109.49]) by smtp.gmail.com with ESMTPSA id z10sm2273308ooz.14.2020.09.28.12.13.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Sep 2020 12:13:11 -0700 (PDT) Received: (nullmailer pid 3098896 invoked by uid 1000); Mon, 28 Sep 2020 19:13:10 -0000 Date: Mon, 28 Sep 2020 14:13:10 -0500 From: Rob Herring To: Zhen Lei Subject: Re: [PATCH v4 07/20] dt-bindings: arm: hisilicon: convert system controller bindings to json-schema Message-ID: <20200928191310.GA3092001@bogus> References: <20200928151324.2134-1-thunder.leizhen@huawei.com> <20200928151324.2134-8-thunder.leizhen@huawei.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200928151324.2134-8-thunder.leizhen@huawei.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200928_151312_806625_461C8076 X-CRM114-Status: GOOD ( 29.43 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree , Kefeng Wang , linux-kernel , Wei Xu , Libin , Jonathan Cameron , linux-arm-kernel Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Sep 28, 2020 at 11:13:11PM +0800, Zhen Lei wrote: > Convert the Hisilicon system controller and its variants binding to DT > schema format using json-schema. All of them are grouped into one yaml > file, to help users understand differences and avoid repeated > descriptions. > > Signed-off-by: Zhen Lei > --- > .../controller/hisilicon,hi6220-sysctrl.txt | 19 ---- > .../controller/hisilicon,hip01-sysctrl.txt | 19 ---- > .../arm/hisilicon/controller/hisilicon,sysctrl.txt | 25 ----- > .../hisilicon/controller/hisilicon,sysctrl.yaml | 115 +++++++++++++++++++++ > .../bindings/arm/hisilicon/hi3519-sysctrl.txt | 14 --- > 5 files changed, 115 insertions(+), 77 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-sysctrl.txt > delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip01-sysctrl.txt > delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,sysctrl.txt > create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,sysctrl.yaml > delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/hi3519-sysctrl.txt > > diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-sysctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-sysctrl.txt > deleted file mode 100644 > index 07e318eda254f52..000000000000000 > --- a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-sysctrl.txt > +++ /dev/null > @@ -1,19 +0,0 @@ > -Hisilicon Hi6220 system controller > - > -Required properties: > -- compatible : "hisilicon,hi6220-sysctrl" > -- reg : Register address and size > -- #clock-cells: should be set to 1, many clock registers are defined > - under this controller and this property must be present. > - > -Hisilicon designs this controller as one of the system controllers, > -its main functions are the same as Hisilicon system controller, but > -the register offset of some core modules are different. > - > -Example: > - /*for Hi6220*/ > - sys_ctrl: sys_ctrl@f7030000 { > - compatible = "hisilicon,hi6220-sysctrl", "syscon"; > - reg = <0x0 0xf7030000 0x0 0x2000>; > - #clock-cells = <1>; > - }; > diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip01-sysctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip01-sysctrl.txt > deleted file mode 100644 > index db2dfdce799db91..000000000000000 > --- a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip01-sysctrl.txt > +++ /dev/null > @@ -1,19 +0,0 @@ > -Hisilicon HiP01 system controller > - > -Required properties: > -- compatible : "hisilicon,hip01-sysctrl" > -- reg : Register address and size > - > -The HiP01 system controller is mostly compatible with hisilicon > -system controller,but it has some specific control registers for > -HIP01 SoC family, such as slave core boot, and also some same > -registers located at different offset. > - > -Example: > - > - /* for hip01-ca9x2 */ > - sysctrl: system-controller@10000000 { > - compatible = "hisilicon,hip01-sysctrl", "hisilicon,sysctrl"; > - reg = <0x10000000 0x1000>; > - reboot-offset = <0x4>; > - }; > diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,sysctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,sysctrl.txt > deleted file mode 100644 > index 963f7f1ca7a2f0c..000000000000000 > --- a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,sysctrl.txt > +++ /dev/null > @@ -1,25 +0,0 @@ > -Hisilicon system controller > - > -Required properties: > -- compatible : "hisilicon,sysctrl" > -- reg : Register address and size > - > -Optional properties: > -- smp-offset : offset in sysctrl for notifying slave cpu booting > - cpu 1, reg; > - cpu 2, reg + 0x4; > - cpu 3, reg + 0x8; > - If reg value is not zero, cpun exit wfi and go > -- resume-offset : offset in sysctrl for notifying cpu0 when resume > -- reboot-offset : offset in sysctrl for system reboot > - > -Example: > - > - /* for Hi3620 */ > - sysctrl: system-controller@fc802000 { > - compatible = "hisilicon,sysctrl"; > - reg = <0xfc802000 0x1000>; > - smp-offset = <0x31c>; > - resume-offset = <0x308>; > - reboot-offset = <0x4>; > - }; > diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,sysctrl.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,sysctrl.yaml > new file mode 100644 > index 000000000000000..37b214e0a401d7d > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,sysctrl.yaml > @@ -0,0 +1,115 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/arm/hisilicon/controller/hisilicon,sysctrl.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Hisilicon system controller > + > +maintainers: > + - Wei Xu > + > +description: | > + The Hisilicon system controller is used on many Hisilicon boards, it can be > + used to assist the slave core startup, reboot the system, etc. > + > + There are some variants of the Hisilicon system controller, such as HiP01, > + Hi3519, Hi6220 system controller, each of them is mostly compatible with the > + Hisilicon system controller, but some same registers located at different > + offset. In addition, the HiP01 system controller has some specific control > + registers for HIP01 SoC family, such as slave core boot. > + > + The compatible names of each system controller are as follows: > + Hisilicon system controller --> hisilicon,sysctrl > + HiP01 system controller --> hisilicon,hip01-sysctrl > + Hi6220 system controller --> hisilicon,hi6220-sysctrl > + Hi3519 system controller --> hisilicon,hi3519-sysctrl > + > +allOf: > + - if: > + properties: > + compatible: > + contains: > + const: hisilicon,hi6220-sysctrl > + then: > + required: > + - '#clock-cells' > + > +properties: > + compatible: > + oneOf: > + - items: > + - const: hisilicon,sysctrl > + - items: > + - const: hisilicon,sysctrl > + - const: syscon Of these 2, the 1st case should be fixed (add 'syscon' in the dts files). > + - items: > + - const: hisilicon,hip01-sysctrl > + - const: hisilicon,sysctrl > + - items: > + - const: hisilicon,hi6220-sysctrl > + - const: syscon > + - items: > + - const: hisilicon,hi3519-sysctrl > + - const: syscon All the cases with 'syscon' can be a single entry. Use 'enum' for the 1st string. > + > + reg: > + description: Register address and size That's every 'reg' property. Drop it. > + maxItems: 1 > + > + smp-offset: > + description: | > + offset in sysctrl for notifying slave cpu booting > + cpu 1, reg; > + cpu 2, reg + 0x4; > + cpu 3, reg + 0x8; > + If reg value is not zero, cpun exit wfi and go > + $ref: /schemas/types.yaml#/definitions/uint32 > + > + resume-offset: > + description: offset in sysctrl for notifying cpu0 when resume > + $ref: /schemas/types.yaml#/definitions/uint32 > + > + reboot-offset: > + description: offset in sysctrl for system reboot > + $ref: /schemas/types.yaml#/definitions/uint32 > + > + '#clock-cells': > + description: the number of cells occupied by one clock ID. Drop. > + const: 1 > + > +required: > + - compatible > + - reg additionalProperties: false (and in other patches) > + > +examples: > + - | > + /* Hisilicon system controller */ > + system-controller@fc802000 { > + compatible = "hisilicon,sysctrl"; > + reg = <0xfc802000 0x1000>; > + smp-offset = <0x31c>; > + resume-offset = <0x308>; > + reboot-offset = <0x4>; > + }; > + > + /* HiP01 system controller */ > + system-controller@10000000 { > + compatible = "hisilicon,hip01-sysctrl", "hisilicon,sysctrl"; > + reg = <0x10000000 0x1000>; > + reboot-offset = <0x4>; > + }; > + > + /* Hi6220 system controller */ > + system-controller@f7030000 { > + compatible = "hisilicon,hi6220-sysctrl", "syscon"; > + reg = <0xf7030000 0x2000>; > + #clock-cells = <1>; > + }; > + > + /* Hi3519 system controller */ > + system-controller@12010000 { > + compatible = "hisilicon,hi3519-sysctrl", "syscon"; > + reg = <0x12010000 0x1000>; > + }; > +... > diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hi3519-sysctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/hi3519-sysctrl.txt > deleted file mode 100644 > index 8defacc44dd5b9e..000000000000000 > --- a/Documentation/devicetree/bindings/arm/hisilicon/hi3519-sysctrl.txt > +++ /dev/null > @@ -1,14 +0,0 @@ > -* Hisilicon Hi3519 System Controller Block > - > -This bindings use the following binding: > -Documentation/devicetree/bindings/mfd/syscon.yaml > - > -Required properties: > -- compatible: "hisilicon,hi3519-sysctrl". > -- reg: the register region of this block > - > -Examples: > -sysctrl: system-controller@12010000 { > - compatible = "hisilicon,hi3519-sysctrl", "syscon"; > - reg = <0x12010000 0x1000>; > -}; > -- > 1.8.3 > > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel