From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6BD44C4741F for ; Tue, 29 Sep 2020 14:29:32 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CD4332074F for ; Tue, 29 Sep 2020 14:29:31 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="BiZnwjLh" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org CD4332074F Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=zvIs2fjqKyS8/1pQaHkBPBjNt7kw/oPE5INx9cRFriw=; b=BiZnwjLhDdyJwtYTOj27gF3+4 09FXGiBc6+s0jLvFdm2sxGxJoQhGligXvTnTooWeP4QcBd/hlyv4Dln+MQgRMCRjPW3H6pneQMgTl 5MAc+9mivnay38CTbFBhldJ05TYvdwhu3OkJDokw4b5n9oQw/vDLh83DNInD7w4ii4SBf/rHuZvD+ DgAxlCTHdveWm/nMbTj1B24ZKXjU9CsClwtxw40yrE6DxwXiMGKfIglOG0M7VoJS9P90GiOTXwZpz 9ygmVVkvVC/IWdtHn87/PCwZ0PGgpL2pKVMCxY7z8qD/ssPq+8Vd2KfT7rFXC5BhLXSbFQxSAfpLt yM2wBaRaw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kNGbt-0003RJ-18; Tue, 29 Sep 2020 14:28:05 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kNGbp-0003PM-T2 for linux-arm-kernel@lists.infradead.org; Tue, 29 Sep 2020 14:28:03 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1F3D031B; Tue, 29 Sep 2020 07:28:00 -0700 (PDT) Received: from C02TD0UTHF1T.local (unknown [10.57.51.69]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 2B01F3F6CF; Tue, 29 Sep 2020 07:27:55 -0700 (PDT) Date: Tue, 29 Sep 2020 15:27:52 +0100 From: Mark Rutland To: Marco Elver Subject: Re: [PATCH v3 03/10] arm64, kfence: enable KFENCE for ARM64 Message-ID: <20200929142752.GD53442@C02TD0UTHF1T.local> References: <20200921132611.1700350-1-elver@google.com> <20200921132611.1700350-4-elver@google.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200921132611.1700350-4-elver@google.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200929_102802_069734_60D05E40 X-CRM114-Status: GOOD ( 28.25 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: hdanton@sina.com, linux-doc@vger.kernel.org, peterz@infradead.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, linux-mm@kvack.org, edumazet@google.com, glider@google.com, hpa@zytor.com, cl@linux.com, will@kernel.org, sjpark@amazon.com, corbet@lwn.net, x86@kernel.org, kasan-dev@googlegroups.com, mingo@redhat.com, vbabka@suse.cz, rientjes@google.com, aryabinin@virtuozzo.com, keescook@chromium.org, paulmck@kernel.org, jannh@google.com, andreyknvl@google.com, bp@alien8.de, luto@kernel.org, Jonathan.Cameron@huawei.com, tglx@linutronix.de, akpm@linux-foundation.org, dvyukov@google.com, linux-arm-kernel@lists.infradead.org, gregkh@linuxfoundation.org, linux-kernel@vger.kernel.org, penberg@kernel.org, iamjoonsoo.kim@lge.com Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Sep 21, 2020 at 03:26:04PM +0200, Marco Elver wrote: > Add architecture specific implementation details for KFENCE and enable > KFENCE for the arm64 architecture. In particular, this implements the > required interface in . Currently, the arm64 version does > not yet use a statically allocated memory pool, at the cost of a pointer > load for each is_kfence_address(). > > Reviewed-by: Dmitry Vyukov > Co-developed-by: Alexander Potapenko > Signed-off-by: Alexander Potapenko > Signed-off-by: Marco Elver > --- > For ARM64, we would like to solicit feedback on what the best option is > to obtain a constant address for __kfence_pool. One option is to declare > a memory range in the memory layout to be dedicated to KFENCE (like is > done for KASAN), however, it is unclear if this is the best available > option. We would like to avoid touching the memory layout. > --- > arch/arm64/Kconfig | 1 + > arch/arm64/include/asm/kfence.h | 39 +++++++++++++++++++++++++++++++++ > arch/arm64/mm/fault.c | 4 ++++ > 3 files changed, 44 insertions(+) > create mode 100644 arch/arm64/include/asm/kfence.h > > diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig > index 6d232837cbee..1acc6b2877c3 100644 > --- a/arch/arm64/Kconfig > +++ b/arch/arm64/Kconfig > @@ -132,6 +132,7 @@ config ARM64 > select HAVE_ARCH_JUMP_LABEL_RELATIVE > select HAVE_ARCH_KASAN if !(ARM64_16K_PAGES && ARM64_VA_BITS_48) > select HAVE_ARCH_KASAN_SW_TAGS if HAVE_ARCH_KASAN > + select HAVE_ARCH_KFENCE if (!ARM64_16K_PAGES && !ARM64_64K_PAGES) > select HAVE_ARCH_KGDB > select HAVE_ARCH_MMAP_RND_BITS > select HAVE_ARCH_MMAP_RND_COMPAT_BITS if COMPAT > diff --git a/arch/arm64/include/asm/kfence.h b/arch/arm64/include/asm/kfence.h > new file mode 100644 > index 000000000000..608dde80e5ca > --- /dev/null > +++ b/arch/arm64/include/asm/kfence.h > @@ -0,0 +1,39 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > + > +#ifndef __ASM_KFENCE_H > +#define __ASM_KFENCE_H > + > +#include > +#include > +#include > + > +#include > + > +#define KFENCE_SKIP_ARCH_FAULT_HANDLER "el1_sync" > + > +/* > + * FIXME: Support HAVE_ARCH_KFENCE_STATIC_POOL: Use the statically allocated > + * __kfence_pool, to avoid the extra pointer load for is_kfence_address(). By > + * default, however, we do not have struct pages for static allocations. > + */ > + > +static inline bool arch_kfence_initialize_pool(void) > +{ > + const unsigned int num_pages = ilog2(roundup_pow_of_two(KFENCE_POOL_SIZE / PAGE_SIZE)); > + struct page *pages = alloc_pages(GFP_KERNEL, num_pages); > + > + if (!pages) > + return false; > + > + __kfence_pool = page_address(pages); > + return true; > +} > + > +static inline bool kfence_protect_page(unsigned long addr, bool protect) > +{ > + set_memory_valid(addr, 1, !protect); > + > + return true; > +} This is only safe if the linear map is force ot page granularity. That's the default with rodata=full, but this is not always the case, so this will need some interaction with the MMU setup in arch/arm64/mm/mmu.c. Thanks, Mark. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel