From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F1CA8C4363C for ; Wed, 7 Oct 2020 11:44:56 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 73C842064E for ; Wed, 7 Oct 2020 11:44:56 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="jE1ekqNu" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 73C842064E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=HG8l/ddcdcTKZNcXc/eEezNYryXGYHSfQJ/OqJuGpVA=; b=jE1ekqNuRQ36gpLG6NaA2sZ2X SCS70EUOxvgRiRVpEd+VHtZzHZXqR6dEw2ZaKWxc1CbfStpowCnCS0BQR0U9Lmk+IEtEfthnju2Kt WMfSF7uxuSRWwEN1xJRh3hQgpM8SOj8YknnU91XUGIrhTv4RUzWMfMuEyUEG/rALAgJkT7F7UY06l I61k6ONuaXHa++cLKj4UlBIcVwya/rvkQNEHRPE3QJjVSVp5OYAHKKIMjhM2Qai1slnU/Zatsxmnc kPDAPzRQD4Pk1BA440GA6GqsSuOTUh1PnoxHj6bgylId7KHHKbQjoEhQBzFO8qymrOAOHZnMasjmn /8W6O2B0w==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kQ7rC-000530-OY; Wed, 07 Oct 2020 11:43:42 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kQ7rB-00052W-AS for linux-arm-kernel@lists.infradead.org; Wed, 07 Oct 2020 11:43:42 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 996B831B; Wed, 7 Oct 2020 04:43:39 -0700 (PDT) Received: from bogus (unknown [10.57.54.133]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 8315C3F71F; Wed, 7 Oct 2020 04:43:37 -0700 (PDT) Date: Wed, 7 Oct 2020 12:43:35 +0100 From: Sudeep Holla To: Viresh Kumar Subject: Re: [PATCH 4/4] mailbox: arm_mhu: Add ARM MHU doorbell driver Message-ID: <20201007114335.5j7cq4cv4iwbam3g@bogus> References: <20200928114445.19689-1-sudeep.holla@arm.com> <20200928114445.19689-5-sudeep.holla@arm.com> <20201007060525.ya6limypf6ggmtae@vireshk-i7> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20201007060525.ya6limypf6ggmtae@vireshk-i7> User-Agent: NeoMutt/20171215 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201007_074341_416019_90484229 X-CRM114-Status: GOOD ( 19.67 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: DTML , Vincent Guittot , Rob Herring , Jassi Brar , LKML , Bjorn Andersson , Jassi Brar , Rob Herring , Sudeep Holla , Frank Rowand , ALKML Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Oct 07, 2020 at 11:35:25AM +0530, Viresh Kumar wrote: > On 28-09-20, 12:44, Sudeep Holla wrote: > > The MHU drives the signal using a 32-bit register, with all 32 bits > > logically ORed together. The MHU provides a set of registers to enable > > software to set, clear, and check the status of each of the bits of this > > register independently. The use of 32 bits for each interrupt line > > enables software to provide more information about the source of the > > interrupt. For example, each bit of the register can be associated with > > a type of event that can contribute to raising the interrupt. > > > > This patch adds a separate the MHU controller driver for doorbel mode > > of operation using the extended DT binding to add support the same. > > > > Signed-off-by: Sudeep Holla > > --- > > drivers/mailbox/Makefile | 2 +- > > drivers/mailbox/arm_mhu_db.c | 359 +++++++++++++++++++++++++++++++++++ > > Please put an entry in MAINTAINERS as well for this. Sure. -- Regards, Sudeep _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel