From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B4D22C43457 for ; Sat, 17 Oct 2020 06:46:19 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5E95C2074A for ; Sat, 17 Oct 2020 06:46:19 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="lltcRxaz"; dkim=fail reason="signature verification failed" (1024-bit key) header.d=kernel.org header.i=@kernel.org header.b="URdAqCgl" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5E95C2074A Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linuxfoundation.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=OlZn9rMVrL6IUPCa0V2+raI5n79G0UK7xYCKQfZjbe8=; b=lltcRxaz8F/ews4OqMp/G7CLZ XkRuQwVjiQLgq5a0aC41CpveNyEz3w3mCVDBb1kHRWgBX618fch/et+vjYns43c1dYVCzZZQTXs21 cmgt5hKGFnfhbs8kgiidKK1bLDtxFxISvL9kqPx8BYGoUiDsGqsxwJB2es4bl8lAcGd+GHTbKT28h L2Rraiw9npKVBk2b/VjyTql+IFq5vpOaS3oix9lLfj23wSyvu2lrCZyG+CkA3AZjICOMNYKtigOsf DuFTuZ4VLVjMoUZ70AEdJJqjlGTAzlPqrY/qSEcLUqsvqv5r4a0YDKD/f6T5nnqq9rQfCGTY3hgB/ JcF01jQpw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kTfwh-00014T-Jd; Sat, 17 Oct 2020 06:44:03 +0000 Received: from mail.kernel.org ([198.145.29.99]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kTfwe-00013s-1r for linux-arm-kernel@lists.infradead.org; Sat, 17 Oct 2020 06:44:01 +0000 Received: from localhost (83-86-74-64.cable.dynamic.v4.ziggo.nl [83.86.74.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 594302074A; Sat, 17 Oct 2020 06:43:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1602917036; bh=a6zcUKlSgSys512jNLN6WswG7+wX08wIvpptFrELGwc=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=URdAqCglk8hMKDvBnAqd72tRBYV5G+VJ++lmRLx1WQjkFLIdXI6Yo/3kpuZqpR92w 4hOaFHhAjy7ygCldVjCv8LQ4ikTjN0lPhXi23x9a8CjahLJgyuAvaHQyWBdlSJZ+Xr rRZuRSL6WxH7tuIhgihS7Y/kNz5O4KF++SGSK6cw= Date: Sat, 17 Oct 2020 08:44:25 +0200 From: Greg Kroah-Hartman To: Jonathan Cameron Subject: Re: [RFC PATCH] topology: Represent clusters of CPUs within a die. Message-ID: <20201017064425.GB1883987@kroah.com> References: <20201016152702.1513592-1-Jonathan.Cameron@huawei.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20201016152702.1513592-1-Jonathan.Cameron@huawei.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201017_024400_221185_AF5B4A61 X-CRM114-Status: GOOD ( 22.18 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Len Brown , x86@kernel.org, guohanjun@huawei.com, linux-kernel@vger.kernel.org, linuxarm@huawei.com, Brice Goglin , linux-acpi@vger.kernel.org, Sudeep Holla , Will Deacon , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Oct 16, 2020 at 11:27:02PM +0800, Jonathan Cameron wrote: > Both ACPI and DT provide the ability to describe additional layers of > topology between that of individual cores and higher level constructs > such as the level at which the last level cache is shared. > In ACPI this can be represented in PPTT as a Processor Hierarchy > Node Structure [1] that is the parent of the CPU cores and in turn > has a parent Processor Hierarchy Nodes Structure representing > a higher level of topology. > > For example Kunpeng 920 has clusters of 4 CPUs. These do not share > any cache resources, but the interconnect topology is such that > the cost to transfer ownership of a cacheline between CPUs within > a cluster is lower than between CPUs in different clusters on the same > die. Hence, it can make sense to deliberately schedule threads > sharing data to a single cluster. > > This patch simply exposes this information to userspace libraries > like hwloc by providing cluster_cpus and related sysfs attributes. > PoC of HWLOC support at [2]. > > Note this patch only handle the ACPI case. > > Special consideration is needed for SMT processors, where it is > necessary to move 2 levels up the hierarchy from the leaf nodes > (thus skipping the processor core level). > > Currently the ID provided is the offset of the Processor > Hierarchy Nodes Structure within PPTT. Whilst this is unique > it is not terribly elegant so alternative suggestions welcome. > > Note that arm64 / ACPI does not provide any means of identifying > a die level in the topology but that may be unrelate to the cluster > level. > > RFC questions: > 1) Naming > 2) Related to naming, do we want to represent all potential levels, > or this enough? On Kunpeng920, the next level up from cluster happens > to be covered by llc cache sharing, but in theory more than one > level of cluster description might be needed by some future system. > 3) Do we need DT code in place? I'm not sure any DT based ARM64 > systems would have enough complexity for this to be useful. > 4) Other architectures? Is this useful on x86 for example? > > [1] ACPI Specification 6.3 - section 5.2.29.1 processor hierarchy node > structure (Type 0) > [2] https://github.com/hisilicon/hwloc/tree/linux-cluster > > Signed-off-by: Jonathan Cameron > --- > > Documentation/admin-guide/cputopology.rst | 26 ++++++++-- You are adding new sysfs files here, but not adding Documentation/ABI/ entries as well? This cputopology document is nice, but no one knows to look there for sysfs stuff :) thanks, greg k-h _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel