From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5F253C55179 for ; Wed, 21 Oct 2020 15:04:46 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DDFEC20BED for ; Wed, 21 Oct 2020 15:04:45 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="LXxwrRmt" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org DDFEC20BED Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=T8Pk95KYCEwgecnsOLZZhZwGOiB56XVxbr7Gf4VGnIE=; b=LXxwrRmtP89K7SqxNKafWXAD9 Ex19PQ4jLODoKjHMy0Ai9hM1fVcqVR/qP6gLkFsKQmAy1Whoybf3n91T2gRcvixMoFo/RRKkA9ZVg hx2wkQ1l59C3bvy+8CvKWgUi1RaRH7ststiCahRunNJpqe9clhAzwOfYmNaZ5Tg3Sb0ydFIKtoQgs gJ685X/0OU1FaqDLyEoMBgMyaWDOm/qBaqCJMiNsg2FJu2qEwmRRcgg/ETQgzDI7nn7ueIaHaR7yN 618fUff+3LlmvI5Ovxx04+K1e+GDARIVKK6MRe20e06I4LA40j8+NLojTNYOL2XP4GMbMUVXzxRFt fbNRkzHiA==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kVFe8-0002GX-8W; Wed, 21 Oct 2020 15:03:24 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kVFe4-0002Er-G5 for linux-arm-kernel@lists.infradead.org; Wed, 21 Oct 2020 15:03:21 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8BF1D31B; Wed, 21 Oct 2020 08:03:17 -0700 (PDT) Received: from e107158-lin (e107158-lin.cambridge.arm.com [10.1.194.78]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 391343F66B; Wed, 21 Oct 2020 08:03:16 -0700 (PDT) Date: Wed, 21 Oct 2020 16:03:13 +0100 From: Qais Yousef To: Will Deacon Subject: Re: [RFC PATCH v2 4/4] arm64: Export id_aar64fpr0 via sysfs Message-ID: <20201021150313.ecxawwxsowweye43@e107158-lin> References: <20201021104611.2744565-1-qais.yousef@arm.com> <20201021104611.2744565-5-qais.yousef@arm.com> <63fead90e91e08a1b173792b06995765@kernel.org> <20201021121559.GB3976@gaia> <20201021144112.GA17912@willie-the-truck> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20201021144112.GA17912@willie-the-truck> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201021_110320_966952_978ACC8C X-CRM114-Status: GOOD ( 31.78 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arch@vger.kernel.org, Marc Zyngier , "Peter Zijlstra \(Intel\)" , Catalin Marinas , James Morse , Greg Kroah-Hartman , Linus Torvalds , Morten Rasmussen , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 10/21/20 15:41, Will Deacon wrote: > On Wed, Oct 21, 2020 at 01:15:59PM +0100, Catalin Marinas wrote: > > On Wed, Oct 21, 2020 at 12:09:58PM +0100, Marc Zyngier wrote: > > > On 2020-10-21 11:46, Qais Yousef wrote: > > > > Example output. I was surprised that the 2nd field (bits[7:4]) is > > > > printed out > > > > although it's set as FTR_HIDDEN. > > > > > > > > # cat /sys/devices/system/cpu/cpu*/regs/identification/id_aa64pfr0 > > > > 0x0000000000000011 > > > > 0x0000000000000011 > > > > 0x0000000000000011 > > > > 0x0000000000000011 > > > > 0x0000000000000011 > > > > 0x0000000000000011 > > > > > > > > # echo 1 > /proc/sys/kernel/enable_asym_32bit > > > > > > > > # cat /sys/devices/system/cpu/cpu*/regs/identification/id_aa64pfr0 > > > > 0x0000000000000011 > > > > 0x0000000000000011 > > > > 0x0000000000000012 > > > > 0x0000000000000012 > > > > 0x0000000000000011 > > > > 0x0000000000000011 > > > > > > This looks like a terrible userspace interface. It exposes unrelated > > > features, > > > > Not sure why the EL1 field ended up in here, that's not relevant to the > > user. > > > > > and doesn't expose the single useful information that the kernel has: > > > the cpumask describing the CPUs supporting AArch32 at EL0. Why not expose > > > this synthetic piece of information which requires very little effort from > > > userspace and doesn't spit out unrelated stuff? > > > > I thought the whole idea is to try and avoid the "very little effort" > > part ;). > > > > > Not to mention the discrepancy with what userspace gets while reading > > > the same register via the MRS emulation. > > > > > > Granted, the cpumask doesn't fit the cpu*/regs/identification hierarchy, > > > but I don't think this fits either. > > > > We already expose MIDR and REVIDR via the current sysfs interface. We > > can expand it to include _all_ the other ID_* regs currently available > > to user via the MRS emulation and we won't have to debate what a new > > interface would look like. The MRS emulation and the sysfs info should > > probably match, though that means we need to expose the > > ID_AA64PFR0_EL1.EL0 field which we currently don't. > > > > I do agree that an AArch32 cpumask is an easier option both from the > > kernel implementation perspective and from the application usability > > one, though not as easy as automatic task placement by the scheduler (my > > first preference, followed by the id_* regs and the aarch32 mask, though > > not a strong preference for any). > > If a cpumask is easier to implement and easier to use, then I think that's > what we should do. It's also then dead easy to disable if necessary by > just returning 0. The only alternative I would prefer is not having to > expose this information altogether, but I'm not sure that figuring this > out from MIDR/REVIDR alone is reliable. I did suggest this before, but I'll try gain. If we want to assume a custom bootloader and custom user space, we can make them provide the mask. For example, the new sysctl_enable_asym_32bit could be a cpumask instead of a bool as it currently is. Or we can make it a cmdline parameter too. In both cases some admin (bootloader or init process) has to ensure to fill it correctly for the target platform. The bootloader should be able to read the registers to figure out the mask. So more weight to make it a cmdline param. Then the rest of user space can easily parse the cpumask from /proc/sys/kernel/enable_asym_32bit or from /proc/cmdline. Thanks -- Qais Yousef _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel