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Received: from shell.armlinux.org.uk ([fd8f:7570:feb6:1:5054:ff:fe00:4ec]:49924) by pandora.armlinux.org.uk with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1kVu7m-0003Hh-PE; Fri, 23 Oct 2020 11:16:42 +0100 Received: from linux by shell.armlinux.org.uk with local (Exim 4.92) (envelope-from ) id 1kVu7k-0008MT-R3; Fri, 23 Oct 2020 11:16:40 +0100 Date: Fri, 23 Oct 2020 11:16:40 +0100 From: Russell King - ARM Linux admin To: Miles Chen Subject: Re: [PATCH v2 2/4] arm: mm: reordering memory type table Message-ID: <20201023101640.GA1551@shell.armlinux.org.uk> References: <20201023091437.8225-1-miles.chen@mediatek.com> <20201023091437.8225-3-miles.chen@mediatek.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20201023091437.8225-3-miles.chen@mediatek.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201023_061647_391489_82A0EDA4 X-CRM114-Status: GOOD ( 25.07 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Steve Capper , wsd_upstream@mediatek.com, Catalin Marinas , Will Deacon , linux-kernel@vger.kernel.org, Minchan Kim , Simon Horman , linux-mediatek@lists.infradead.org, Suren Baghdasaryan , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Oct 23, 2020 at 05:14:35PM +0800, Miles Chen wrote: > From: Minchan Kim > > To use bit 5 in page table as L_PTE_SPECIAL, we need a room for that. > It seems we don't need 4 bits for the memory type with ARMv6+. > If it's true, let's reorder bits to make bit 5 free. > > We will use the bit for L_PTE_SPECIAL in next patch. > > A note from Catalin in [1]: > " > > Anyway, on ARMv7 or ARMv6+LPAE, the non-shared device gets mapped to > > shared device in hardware. Looking through the arm32 code, it seems that > > MT_DEVICE_NONSHARED is used by arch/arm/mach-shmobile/setup-r8a7779.c > > and IIUC that's a v7 platform (R-Car H1, Cortex-A9). I think the above > > should be defined to L_PTE_MT_DEV_SHARED, unless I miss any place where > > DEV_NONSHARED is relevant on ARMv6 (adding Simon to confirm on shmbile). > " > > [1] https://lore.kernel.org/patchwork/patch/986574/ > > Cc: Russell King > Cc: Catalin Marinas > Cc: Will Deacon > Cc: Steve Capper > Cc: Simon Horman > Cc: Minchan Kim > Cc: Suren Baghdasaryan > Signed-off-by: Minchan Kim > Signed-off-by: Miles Chen > --- > arch/arm/include/asm/pgtable-2level.h | 21 +++++++++++++++++---- > arch/arm/mm/proc-macros.S | 4 ++-- > 2 files changed, 19 insertions(+), 6 deletions(-) > > diff --git a/arch/arm/include/asm/pgtable-2level.h b/arch/arm/include/asm/pgtable-2level.h > index 27a8635abea0..cdcd55cca37d 100644 > --- a/arch/arm/include/asm/pgtable-2level.h > +++ b/arch/arm/include/asm/pgtable-2level.h > @@ -161,14 +161,27 @@ > #define L_PTE_MT_BUFFERABLE (_AT(pteval_t, 0x01) << 2) /* 0001 */ > #define L_PTE_MT_WRITETHROUGH (_AT(pteval_t, 0x02) << 2) /* 0010 */ > #define L_PTE_MT_WRITEBACK (_AT(pteval_t, 0x03) << 2) /* 0011 */ > +#define L_PTE_MT_DEV_SHARED (_AT(pteval_t, 0x04) << 2) /* 0100 */ > +#define L_PTE_MT_VECTORS (_AT(pteval_t, 0x05) << 2) /* 0101 */ > #define L_PTE_MT_MINICACHE (_AT(pteval_t, 0x06) << 2) /* 0110 (sa1100, xscale) */ > #define L_PTE_MT_WRITEALLOC (_AT(pteval_t, 0x07) << 2) /* 0111 */ > -#define L_PTE_MT_DEV_SHARED (_AT(pteval_t, 0x04) << 2) /* 0100 */ > -#define L_PTE_MT_DEV_NONSHARED (_AT(pteval_t, 0x0c) << 2) /* 1100 */ Sorry, no, this isn't going to work. The lower two bits of this (bits 2 and 3) are explicitly designed to fit the C and B bits used in older architectures. Changing L_PTE_MT_VECTORS from having value '11' to '01' changes the functionality on older CPUs. -- RMK's Patch system: https://www.armlinux.org.uk/developer/patches/ FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last! _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel