[PATCH 0/5] Add PWM support for MT8183 EVB

[PATCH 0/5] Add PWM support for MT8183 EVB

[Fabien Parent]

This patch series adds PWM to MT8183 EVB. MT8183 has 4 PWM channels.

Fabien Parent (5):
  dt-bindings: pwm: pwm-mediatek: Add documentation for MT8183 SoC
  pwm: pwm-mediatek: always use bus clock
  pwm: pwm-mediatek: Add MT8183 SoC support
  arm64: dts: mediatek: mt8183: add pwm node
  arm64: dts: mediatek: mt8183-evb: add PWM support

 .../devicetree/bindings/pwm/pwm-mediatek.txt  |  1 +
 arch/arm64/boot/dts/mediatek/mt8183-evb.dts   | 12 ++++++++++++
 arch/arm64/boot/dts/mediatek/mt8183.dtsi      | 14 ++++++++++++++
 drivers/pwm/pwm-mediatek.c                    | 19 +++++++++++++++++++
 4 files changed, 46 insertions(+)

-- 
2.28.0


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[PATCH 1/5] dt-bindings: pwm: pwm-mediatek: Add documentation for MT8183 SoC

[Fabien Parent]

Add binding documentation for the MT8183 SoC.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
---
 Documentation/devicetree/bindings/pwm/pwm-mediatek.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt b/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt
index 29adff59c479..25ed214473d7 100644
--- a/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt
+++ b/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt
@@ -7,6 +7,7 @@ Required properties:
    - "mediatek,mt7623-pwm": found on mt7623 SoC.
    - "mediatek,mt7628-pwm": found on mt7628 SoC.
    - "mediatek,mt7629-pwm": found on mt7629 SoC.
+   - "mediatek,mt8183-pwm": found on mt8183 SoC.
    - "mediatek,mt8516-pwm": found on mt8516 SoC.
  - reg: physical base address and length of the controller's registers.
  - #pwm-cells: must be 2. See pwm.yaml in this directory for a description of
-- 
2.28.0


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Re: [PATCH 1/5] dt-bindings: pwm: pwm-mediatek: Add documentation for MT8183 SoC

[Matthias Brugger]

On 19/10/2020 16:07, Fabien Parent wrote:
> Add binding documentation for the MT8183 SoC.
> 
> Signed-off-by: Fabien Parent <fparent@baylibre.com>

Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>

> ---
>   Documentation/devicetree/bindings/pwm/pwm-mediatek.txt | 1 +
>   1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt b/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt
> index 29adff59c479..25ed214473d7 100644
> --- a/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt
> +++ b/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt
> @@ -7,6 +7,7 @@ Required properties:
>      - "mediatek,mt7623-pwm": found on mt7623 SoC.
>      - "mediatek,mt7628-pwm": found on mt7628 SoC.
>      - "mediatek,mt7629-pwm": found on mt7629 SoC.
> +   - "mediatek,mt8183-pwm": found on mt8183 SoC.
>      - "mediatek,mt8516-pwm": found on mt8516 SoC.
>    - reg: physical base address and length of the controller's registers.
>    - #pwm-cells: must be 2. See pwm.yaml in this directory for a description of
> 

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Re: [PATCH 1/5] dt-bindings: pwm: pwm-mediatek: Add documentation for MT8183 SoC

[Rob Herring]

On Mon, 19 Oct 2020 16:07:01 +0200, Fabien Parent wrote:
> Add binding documentation for the MT8183 SoC.
> 
> Signed-off-by: Fabien Parent <fparent@baylibre.com>
> ---
>  Documentation/devicetree/bindings/pwm/pwm-mediatek.txt | 1 +
>  1 file changed, 1 insertion(+)
> 

Acked-by: Rob Herring <robh@kernel.org>

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[PATCH 2/5] pwm: pwm-mediatek: always use bus clock

[Fabien Parent]

The MediaTek PWM IP can sometimes use the 26MHz source clock to generate
the PWM signal, but the driver currently assumes that we always use
the PWM bus clock to generate the PWM signal.

This commit modifies the PWM driver in order to force the PWM IP to
always use the bus clock as source clock.

I do not have the datasheet of all the MediaTek SoC, so I don't know
if the register to choose the source clk is present in all the SoCs
or only in subset. As a consequence I made this change optional by
using a platform data paremeter to says whether this register is
supported or not. On all the SoC I don't have the datasheet
(MT2712, MT7622, MT7623, MT7628, MT7629) I kept the behavior
to be the same as before this change.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
---
 drivers/pwm/pwm-mediatek.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/drivers/pwm/pwm-mediatek.c b/drivers/pwm/pwm-mediatek.c
index ab001ce55178..108881619aea 100644
--- a/drivers/pwm/pwm-mediatek.c
+++ b/drivers/pwm/pwm-mediatek.c
@@ -30,12 +30,14 @@
 #define PWM45DWIDTH_FIXUP	0x30
 #define PWMTHRES		0x30
 #define PWM45THRES_FIXUP	0x34
+#define PWM_CK_26M_SEL		0x210
 
 #define PWM_CLK_DIV_MAX		7
 
 struct pwm_mediatek_of_data {
 	unsigned int num_pwms;
 	bool pwm45_fixup;
+	bool has_ck_26m_sel;
 };
 
 /**
@@ -132,6 +134,10 @@ static int pwm_mediatek_config(struct pwm_chip *chip, struct pwm_device *pwm,
 	if (ret < 0)
 		return ret;
 
+	/* Make sure we use the bus clock and not the 26MHz clock */
+	if (pc->soc->has_ck_26m_sel)
+		writel(0, pc->regs + PWM_CK_26M_SEL);
+
 	/* Using resolution in picosecond gets accuracy higher */
 	resolution = (u64)NSEC_PER_SEC * 1000;
 	do_div(resolution, clk_get_rate(pc->clk_pwms[pwm->hwpwm]));
@@ -281,31 +287,37 @@ static int pwm_mediatek_remove(struct platform_device *pdev)
 static const struct pwm_mediatek_of_data mt2712_pwm_data = {
 	.num_pwms = 8,
 	.pwm45_fixup = false,
+	.has_ck_26m_sel = false,
 };
 
 static const struct pwm_mediatek_of_data mt7622_pwm_data = {
 	.num_pwms = 6,
 	.pwm45_fixup = false,
+	.has_ck_26m_sel = false,
 };
 
 static const struct pwm_mediatek_of_data mt7623_pwm_data = {
 	.num_pwms = 5,
 	.pwm45_fixup = true,
+	.has_ck_26m_sel = false,
 };
 
 static const struct pwm_mediatek_of_data mt7628_pwm_data = {
 	.num_pwms = 4,
 	.pwm45_fixup = true,
+	.has_ck_26m_sel = false,
 };
 
 static const struct pwm_mediatek_of_data mt7629_pwm_data = {
 	.num_pwms = 1,
 	.pwm45_fixup = false,
+	.has_ck_26m_sel = false,
 };
 
 static const struct pwm_mediatek_of_data mt8516_pwm_data = {
 	.num_pwms = 5,
 	.pwm45_fixup = false,
+	.has_ck_26m_sel = true,
 };
 
 static const struct of_device_id pwm_mediatek_of_match[] = {
-- 
2.28.0


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Re: [PATCH 2/5] pwm: pwm-mediatek: always use bus clock

[Matthias Brugger]

On 19/10/2020 16:07, Fabien Parent wrote:
> The MediaTek PWM IP can sometimes use the 26MHz source clock to generate
> the PWM signal, but the driver currently assumes that we always use
> the PWM bus clock to generate the PWM signal.
> 
> This commit modifies the PWM driver in order to force the PWM IP to
> always use the bus clock as source clock.
> 
> I do not have the datasheet of all the MediaTek SoC, so I don't know
> if the register to choose the source clk is present in all the SoCs
> or only in subset. As a consequence I made this change optional by
> using a platform data paremeter to says whether this register is
> supported or not. On all the SoC I don't have the datasheet
> (MT2712, MT7622, MT7623, MT7628, MT7629) I kept the behavior
> to be the same as before this change.
> 
> Signed-off-by: Fabien Parent <fparent@baylibre.com>

Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>

> ---
>   drivers/pwm/pwm-mediatek.c | 12 ++++++++++++
>   1 file changed, 12 insertions(+)
> 
> diff --git a/drivers/pwm/pwm-mediatek.c b/drivers/pwm/pwm-mediatek.c
> index ab001ce55178..108881619aea 100644
> --- a/drivers/pwm/pwm-mediatek.c
> +++ b/drivers/pwm/pwm-mediatek.c
> @@ -30,12 +30,14 @@
>   #define PWM45DWIDTH_FIXUP	0x30
>   #define PWMTHRES		0x30
>   #define PWM45THRES_FIXUP	0x34
> +#define PWM_CK_26M_SEL		0x210
>   
>   #define PWM_CLK_DIV_MAX		7
>   
>   struct pwm_mediatek_of_data {
>   	unsigned int num_pwms;
>   	bool pwm45_fixup;
> +	bool has_ck_26m_sel;
>   };
>   
>   /**
> @@ -132,6 +134,10 @@ static int pwm_mediatek_config(struct pwm_chip *chip, struct pwm_device *pwm,
>   	if (ret < 0)
>   		return ret;
>   
> +	/* Make sure we use the bus clock and not the 26MHz clock */
> +	if (pc->soc->has_ck_26m_sel)
> +		writel(0, pc->regs + PWM_CK_26M_SEL);
> +
>   	/* Using resolution in picosecond gets accuracy higher */
>   	resolution = (u64)NSEC_PER_SEC * 1000;
>   	do_div(resolution, clk_get_rate(pc->clk_pwms[pwm->hwpwm]));
> @@ -281,31 +287,37 @@ static int pwm_mediatek_remove(struct platform_device *pdev)
>   static const struct pwm_mediatek_of_data mt2712_pwm_data = {
>   	.num_pwms = 8,
>   	.pwm45_fixup = false,
> +	.has_ck_26m_sel = false,
>   };
>   
>   static const struct pwm_mediatek_of_data mt7622_pwm_data = {
>   	.num_pwms = 6,
>   	.pwm45_fixup = false,
> +	.has_ck_26m_sel = false,
>   };
>   
>   static const struct pwm_mediatek_of_data mt7623_pwm_data = {
>   	.num_pwms = 5,
>   	.pwm45_fixup = true,
> +	.has_ck_26m_sel = false,
>   };
>   
>   static const struct pwm_mediatek_of_data mt7628_pwm_data = {
>   	.num_pwms = 4,
>   	.pwm45_fixup = true,
> +	.has_ck_26m_sel = false,
>   };
>   
>   static const struct pwm_mediatek_of_data mt7629_pwm_data = {
>   	.num_pwms = 1,
>   	.pwm45_fixup = false,
> +	.has_ck_26m_sel = false,
>   };
>   
>   static const struct pwm_mediatek_of_data mt8516_pwm_data = {
>   	.num_pwms = 5,
>   	.pwm45_fixup = false,
> +	.has_ck_26m_sel = true,
>   };
>   
>   static const struct of_device_id pwm_mediatek_of_match[] = {
> 

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[PATCH 3/5] pwm: pwm-mediatek: Add MT8183 SoC support

[Fabien Parent]

Add PWM support for the MT8183 SoC

Signed-off-by: Fabien Parent <fparent@baylibre.com>
---
 drivers/pwm/pwm-mediatek.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/pwm/pwm-mediatek.c b/drivers/pwm/pwm-mediatek.c
index 108881619aea..9052b500b8f0 100644
--- a/drivers/pwm/pwm-mediatek.c
+++ b/drivers/pwm/pwm-mediatek.c
@@ -314,6 +314,12 @@ static const struct pwm_mediatek_of_data mt7629_pwm_data = {
 	.has_ck_26m_sel = false,
 };
 
+static const struct pwm_mediatek_of_data mt8183_pwm_data = {
+	.num_pwms = 4,
+	.pwm45_fixup = false,
+	.has_ck_26m_sel = true,
+};
+
 static const struct pwm_mediatek_of_data mt8516_pwm_data = {
 	.num_pwms = 5,
 	.pwm45_fixup = false,
@@ -326,6 +332,7 @@ static const struct of_device_id pwm_mediatek_of_match[] = {
 	{ .compatible = "mediatek,mt7623-pwm", .data = &mt7623_pwm_data },
 	{ .compatible = "mediatek,mt7628-pwm", .data = &mt7628_pwm_data },
 	{ .compatible = "mediatek,mt7629-pwm", .data = &mt7629_pwm_data },
+	{ .compatible = "mediatek,mt8183-pwm", .data = &mt8183_pwm_data },
 	{ .compatible = "mediatek,mt8516-pwm", .data = &mt8516_pwm_data },
 	{ },
 };
-- 
2.28.0


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Re: [PATCH 3/5] pwm: pwm-mediatek: Add MT8183 SoC support

[Matthias Brugger]

On 19/10/2020 16:07, Fabien Parent wrote:
> Add PWM support for the MT8183 SoC
> 
> Signed-off-by: Fabien Parent <fparent@baylibre.com>

Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>

> ---
>   drivers/pwm/pwm-mediatek.c | 7 +++++++
>   1 file changed, 7 insertions(+)
> 
> diff --git a/drivers/pwm/pwm-mediatek.c b/drivers/pwm/pwm-mediatek.c
> index 108881619aea..9052b500b8f0 100644
> --- a/drivers/pwm/pwm-mediatek.c
> +++ b/drivers/pwm/pwm-mediatek.c
> @@ -314,6 +314,12 @@ static const struct pwm_mediatek_of_data mt7629_pwm_data = {
>   	.has_ck_26m_sel = false,
>   };
>   
> +static const struct pwm_mediatek_of_data mt8183_pwm_data = {
> +	.num_pwms = 4,
> +	.pwm45_fixup = false,
> +	.has_ck_26m_sel = true,
> +};
> +
>   static const struct pwm_mediatek_of_data mt8516_pwm_data = {
>   	.num_pwms = 5,
>   	.pwm45_fixup = false,
> @@ -326,6 +332,7 @@ static const struct of_device_id pwm_mediatek_of_match[] = {
>   	{ .compatible = "mediatek,mt7623-pwm", .data = &mt7623_pwm_data },
>   	{ .compatible = "mediatek,mt7628-pwm", .data = &mt7628_pwm_data },
>   	{ .compatible = "mediatek,mt7629-pwm", .data = &mt7629_pwm_data },
> +	{ .compatible = "mediatek,mt8183-pwm", .data = &mt8183_pwm_data },
>   	{ .compatible = "mediatek,mt8516-pwm", .data = &mt8516_pwm_data },
>   	{ },
>   };
> 

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[PATCH 4/5] arm64: dts: mediatek: mt8183: add pwm node

[Fabien Parent]

MT8183 SoC has 4 PWMs. Add the pwm node in order to support them.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
---
 arch/arm64/boot/dts/mediatek/mt8183.dtsi | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 9a3cf95676e1..290d15dd9490 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -709,6 +709,20 @@ mmc1: mmc@11240000 {
 			status = "disabled";
 		};
 
+		pwm0: pwm@11006000 {
+			compatible = "mediatek,mt8183-pwm";
+			reg = <0 0x11006000 0 0x1000>;
+			#pwm-cells = <2>;
+			clocks = <&infracfg CLK_INFRA_PWM>,
+				 <&infracfg CLK_INFRA_PWM_HCLK>,
+				 <&infracfg CLK_INFRA_PWM1>,
+				 <&infracfg CLK_INFRA_PWM2>,
+				 <&infracfg CLK_INFRA_PWM3>,
+				 <&infracfg CLK_INFRA_PWM4>;
+			clock-names = "top", "main", "pwm1", "pwm2", "pwm3",
+				      "pwm4";
+		};
+
 		efuse: efuse@11f10000 {
 			compatible = "mediatek,mt8183-efuse",
 				     "mediatek,efuse";
-- 
2.28.0


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[PATCH 5/5] arm64: dts: mediatek: mt8183-evb: add PWM support

[Fabien Parent]

Enable the pwm driver and set the pinctrl for PWM A line.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
---
 arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
index ae405bd8f06b..c8e1d97e564f 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
+++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
@@ -333,6 +333,12 @@ pins_spi{
 			bias-disable;
 		};
 	};
+
+	pwm0_pin_default: pwm0 {
+		pwm {
+			pinmux = <PINMUX_GPIO90__FUNC_PWM_A>;
+		};
+	};
 };
 
 &spi0 {
@@ -381,3 +387,9 @@ &spi5 {
 &uart0 {
 	status = "okay";
 };
+
+&pwm0 {
+	status = "okay";
+	pinctrl-0 = <&pwm0_pin_default>;
+	pinctrl-names = "default";
+};
-- 
2.28.0


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Re: [PATCH 0/5] Add PWM support for MT8183 EVB

[Thierry Reding]

[-- Attachment #1.1: Type: text/plain, Size: 375 bytes --]

On Mon, Oct 19, 2020 at 04:07:00PM +0200, Fabien Parent wrote:
> This patch series adds PWM to MT8183 EVB. MT8183 has 4 PWM channels.
> 
> Fabien Parent (5):
>   dt-bindings: pwm: pwm-mediatek: Add documentation for MT8183 SoC
>   pwm: pwm-mediatek: always use bus clock
>   pwm: pwm-mediatek: Add MT8183 SoC support

Applied these three patches, thanks.

Thierry

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[-- Attachment #2: Type: text/plain, Size: 176 bytes --]

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