From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A72BCC4363A for ; Mon, 26 Oct 2020 14:24:45 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 334E52075B for ; Mon, 26 Oct 2020 14:24:45 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="Ox1s1gta" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 334E52075B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=bJzf022K45lejE9uM0NOx85yPmbtj1Sz3r/g3+PZWpE=; b=Ox1s1gtaAPv0012Dy3Sq9kFLx egRqDsblvZNxah82n4kTnHwqhKdLkrQx9cStrYf3WExKa3nJVtf+izJVfus8s5dentDGUarNuv1Gs ZZJR6iDWBG1CziZl6W9xhFRALX9q8jrMHiGz2WLVruBzSVWEojtjMmpIrAuHZNrHKd8HbnTvN6MHe 2kWjk6uH5UQgB27Tf1JwpWyWYjlSqapCsllvoAdOsRzVFGzx/d3+5MIcKih9cD6Im4qjmCKjcZYbh vF5hcF19Me1djoRuuAnBKm0dJd06zGUM5DMpTNkIfsDYkuwteHW4Zj5/vvmIB//vF25J/tUY/dk6l pu6RqalOw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kX3Oh-0006Uu-NW; Mon, 26 Oct 2020 14:22:55 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kX3Oe-0006Tu-Jy for linux-arm-kernel@lists.infradead.org; Mon, 26 Oct 2020 14:22:53 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 74CB130E; Mon, 26 Oct 2020 07:22:49 -0700 (PDT) Received: from C02TD0UTHF1T.local (unknown [10.57.56.187]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 2995B3F68F; Mon, 26 Oct 2020 07:22:47 -0700 (PDT) Date: Mon, 26 Oct 2020 14:22:45 +0000 From: Mark Rutland To: Marc Zyngier Subject: Re: [PATCH 01/11] KVM: arm64: Don't adjust PC on SError during SMC trap Message-ID: <20201026142245.GI12454@C02TD0UTHF1T.local> References: <20201026133450.73304-1-maz@kernel.org> <20201026133450.73304-2-maz@kernel.org> <20201026135308.GC12454@C02TD0UTHF1T.local> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201026_102252_741401_BE9913BC X-CRM114-Status: GOOD ( 12.41 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Will Deacon , kernel-team@android.com, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Oct 26, 2020 at 02:08:35PM +0000, Marc Zyngier wrote: > On 2020-10-26 13:53, Mark Rutland wrote: > > Assuming that there is no 16-bit HVC: > > It is actually impossible to have a 16bit encoding for HVC, as > it always convey a 16bit immediate, and you need some space > to encode the instruction itself! Ah, of course! Mark. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel