From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.3 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E2F4FC388F9 for ; Tue, 27 Oct 2020 11:46:15 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7FDE0207C3 for ; Tue, 27 Oct 2020 11:46:15 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="PefccYFq" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7FDE0207C3 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=mGYr+cEemtPjUgJMyJMU8AzHLGYhnGpYoh++Dp+RuyY=; b=PefccYFquxU4frbHpW3gxaAPa Wz/7vnD5x1xUkbbFhDqUrBygU/Fc1wfoidloyh2iqJ5AHxcJwrhfaR7OJMJ65SqQy/lmEPWvpV6Sn +1OrzNwL2rWEPu63CH/HZSMYXH4D8IOB+rh6mwvWYXHlVda0uZ027AjRgx3Xo1tFizU16Qhs+H5rj 0c6gaLEI5HCWesaYSjW8PdNJ7EZLrvzXK6Ly/fp7Q0jPQCumSGLCpgky+zRABhmBbzpHSdIHB2jK5 YjW7lWb8dR4pFSdjAiXxkkjLfAmM6uAKFKQpQdNuI6eBjhlAIpo2JG4KME/FamVDE5ka4ZyHyKU5b LRP+Gx7Yw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kXNPO-0008TY-R2; Tue, 27 Oct 2020 11:44:58 +0000 Received: from mail.kernel.org ([198.145.29.99]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kXNPM-0008Sn-0t for linux-arm-kernel@lists.infradead.org; Tue, 27 Oct 2020 11:44:56 +0000 Received: from gaia (unknown [95.145.162.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 54013207C3; Tue, 27 Oct 2020 11:44:53 +0000 (UTC) Date: Tue, 27 Oct 2020 11:44:50 +0000 From: Catalin Marinas To: Szabolcs Nagy Subject: Re: [PATCH] arm64: mte: Document that user PSTATE.TCO is ignored by kernel uaccess Message-ID: <20201027114450.GB21448@gaia> References: <20201026121656.26096-1-catalin.marinas@arm.com> <20201026131414.GA24349@willie-the-truck> <20201026141759.GC3117@gaia> <20201027113324.GX3819@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20201027113324.GX3819@arm.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201027_074456_151246_965251BC X-CRM114-Status: GOOD ( 27.06 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Branislav Rankov , nd@arm.com, Will Deacon , andreyknvl@google.com, Vincenzo Frascino , pcc@google.com, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Oct 27, 2020 at 11:33:24AM +0000, Szabolcs Nagy wrote: > The 10/26/2020 14:18, Catalin Marinas wrote: > > On Mon, Oct 26, 2020 at 01:14:15PM +0000, Will Deacon wrote: > > > On Mon, Oct 26, 2020 at 12:16:56PM +0000, Catalin Marinas wrote: > > > > On exception entry, the kernel explicitly resets the PSTATE.TCO (tag > > > > check override) so that any kernel memory accesses will be checked (the > > > > bit is restored on exception return). This has the side-effect that the > > > > uaccess routines will not honour the PSTATE.TCO that may have been set > > > > by the user prior to a syscall. > > > > > > > > There is no issue in practice since PSTATE.TCO is expected to be used > > > > only for brief periods in specific routines (e.g. garbage collection). > > > > To control the tag checking mode of the uaccess routines, the user will > > > > have to invoke a corresponding prctl() call. > > > > > > > > Document the kernel behaviour w.r.t. PSTATE.TCO accordingly. > > > > > > > > Signed-off-by: Catalin Marinas > > > > Fixes: df9d7a22dd21 ("arm64: mte: Add Memory Tagging Extension documentation") > > > > Cc: Will Deacon > > > > Cc: Szabolcs Nagy > > > > --- > > > > Documentation/arm64/memory-tagging-extension.rst | 4 +++- > > > > 1 file changed, 3 insertions(+), 1 deletion(-) > > > > > > > > diff --git a/Documentation/arm64/memory-tagging-extension.rst b/Documentation/arm64/memory-tagging-extension.rst > > > > index 034d37c605e8..648f8e8d480b 100644 > > > > --- a/Documentation/arm64/memory-tagging-extension.rst > > > > +++ b/Documentation/arm64/memory-tagging-extension.rst > > > > @@ -102,7 +102,9 @@ applications. > > > > system call) are not checked if the user thread tag checking mode is > > > > ``PR_MTE_TCF_NONE`` or ``PR_MTE_TCF_ASYNC``. If the tag checking mode is > > > > ``PR_MTE_TCF_SYNC``, the kernel makes a best effort to check its user > > > > -address accesses, however it cannot always guarantee it. > > > > +address accesses, however it cannot always guarantee it. The user > > > > +``PSTATE.TCO`` bit is ignored by the kernel accesses to user addresses, > > > > +its value assumed 0. > > > > > > nit, but the wording feels a bit odd to me here. How about: > > > > > > Kernel accesses to user addresses are always performed with an effective > > > PSTATE.TCO value of zero, regardless of the user configuration. > > > > That's better. Thanks. > > looks good. > i assume this means a signal handler will also have tco=0. Yes, it's already documented that signal handlers are always invoked with PSTATE.TCO=0. -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel