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Tue, 27 Oct 2020 10:14:35 -0500 Received: from DFLE114.ent.ti.com (10.64.6.35) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Tue, 27 Oct 2020 10:14:35 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Tue, 27 Oct 2020 10:14:35 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 09RFEYHt020641; Tue, 27 Oct 2020 10:14:35 -0500 Date: Tue, 27 Oct 2020 10:14:34 -0500 From: Nishanth Menon To: Tomi Valkeinen Subject: Re: [PATCH 3/4] arm64: dts: ti: k3-am65: mark dss as dma-coherent Message-ID: <20201027151434.getywrdbjidcggth@marshy> References: <20201027104132.105485-1-tomi.valkeinen@ti.com> <20201027104132.105485-4-tomi.valkeinen@ti.com> <20201027123412.ghwb5p3ruzm7lpqo@repent> <25f63a9b-7473-949b-2310-5c00440fb830@ti.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <25f63a9b-7473-949b-2310-5c00440fb830@ti.com> User-Agent: NeoMutt/20171215 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201027_111437_596744_E80499D5 X-CRM114-Status: GOOD ( 17.25 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tero Kristo , devicetree@vger.kernel.org, Kishon Vijay Abraham I , linux-arm-kernel@lists.infradead.org, Swapnil Jakhade Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 16:45-20201027, Tomi Valkeinen wrote: > On 27/10/2020 14:34, Nishanth Menon wrote: > > On 12:41-20201027, Tomi Valkeinen wrote: > >> DSS is IO coherent on AM65, so we can mark it as such with > >> 'dma-coherent' property in the DT file. > >> > >> Signed-off-by: Tomi Valkeinen > >> --- > >> arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 2 ++ > >> 1 file changed, 2 insertions(+) > >> > >> diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi > >> index 533525229a8d..a0b4a421026f 100644 > >> --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi > >> +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi > >> @@ -867,6 +867,8 @@ dss: dss@04a00000 { > >> > >> status = "disabled"; > >> > >> + dma-coherent; > >> + > >> dss_ports: ports { > >> #address-cells = <1>; > >> #size-cells = <0>; > >> -- > >> Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. > >> Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki > >> > > > > Does it need to be part of this series? > > No. The two DP patches should go together, but the am6 ones can be applied independently. Please split accordingly. -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel