From: Marc Zyngier <maz@kernel.org>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
Santosh Shukla <sashukla@nvidia.com>,
Gavin Shan <gshan@redhat.com>,
kvm@vger.kernel.org, Quentin Perret <qperret@google.com>,
kernel-team@android.com,
Suzuki K Poulose <suzuki.poulose@arm.com>,
kvmarm@lists.cs.columbia.edu,
Vladimir Murzin <vladimir.murzin@arm.com>,
James Morse <james.morse@arm.com>,
linux-arm-kernel@lists.infradead.org,
David Brazdil <dbrazdil@google.com>,
Will Deacon <will@kernel.org>, Qais Yousef <qais.yousef@arm.com>,
Julien Thierry <julien.thierry.kdev@gmail.com>
Subject: [PATCH 12/12] KVM: arm64: Handle Asymmetric AArch32 systems
Date: Fri, 30 Oct 2020 16:40:17 +0000 [thread overview]
Message-ID: <20201030164017.244287-13-maz@kernel.org> (raw)
In-Reply-To: <20201030164017.244287-1-maz@kernel.org>
From: Qais Yousef <qais.yousef@arm.com>
On a system without uniform support for AArch32 at EL0, it is possible
for the guest to force run AArch32 at EL0 and potentially cause an
illegal exception if running on a core without AArch32. Add an extra
check so that if we catch the guest doing that, then we prevent it from
running again by resetting vcpu->arch.target and return
ARM_EXCEPTION_IL.
We try to catch this misbehaviour as early as possible and not rely on
an illegal exception occuring to signal the problem. Attempting to run a
32bit app in the guest will produce an error from QEMU if the guest
exits while running in AArch32 EL0.
Tested on Juno by instrumenting the host to fake asym aarch32 and
instrumenting KVM to make the asymmetry visible to the guest.
[will: Incorporated feedback from Marc]
Signed-off-by: Qais Yousef <qais.yousef@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Cc: James Morse <james.morse@arm.com>
Cc: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20201021104611.2744565-2-qais.yousef@arm.com
Link: https://lore.kernel.org/r/20201027215118.27003-2-will@kernel.org
---
arch/arm64/kvm/arm.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c
index f56122eedffc..a3b32df1afb0 100644
--- a/arch/arm64/kvm/arm.c
+++ b/arch/arm64/kvm/arm.c
@@ -808,6 +808,25 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
preempt_enable();
+ /*
+ * The ARMv8 architecture doesn't give the hypervisor
+ * a mechanism to prevent a guest from dropping to AArch32 EL0
+ * if implemented by the CPU. If we spot the guest in such
+ * state and that we decided it wasn't supposed to do so (like
+ * with the asymmetric AArch32 case), return to userspace with
+ * a fatal error.
+ */
+ if (!system_supports_32bit_el0() && vcpu_mode_is_32bit(vcpu)) {
+ /*
+ * As we have caught the guest red-handed, decide that
+ * it isn't fit for purpose anymore by making the vcpu
+ * invalid. The VMM can try and fix it by issuing a
+ * KVM_ARM_VCPU_INIT if it really wants to.
+ */
+ vcpu->arch.target = -1;
+ ret = ARM_EXCEPTION_IL;
+ }
+
ret = handle_exit(vcpu, ret);
}
--
2.28.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-10-30 16:55 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-30 16:40 [GIT PULL] KVM/arm64 fixes for 5.10, take #1 Marc Zyngier
2020-10-30 16:40 ` [PATCH 01/12] KVM: arm64: Don't corrupt tpidr_el2 on failed HVC call Marc Zyngier
2020-10-30 16:40 ` [PATCH 02/12] KVM: arm64: Remove leftover kern_hyp_va() in nVHE TLB invalidation Marc Zyngier
2020-10-30 16:40 ` [PATCH 03/12] KVM: arm64: Drop useless PAN setting on host EL1 to EL2 transition Marc Zyngier
2020-10-30 16:40 ` [PATCH 04/12] KVM: arm64: Allocate stage-2 pgd pages with GFP_KERNEL_ACCOUNT Marc Zyngier
2020-10-30 16:40 ` [PATCH 05/12] KVM: arm64: Fix AArch32 handling of DBGD{CCINT, SCRext} and DBGVCR Marc Zyngier
2020-10-30 16:40 ` [PATCH 06/12] KVM: arm64: Fix masks in stage2_pte_cacheable() Marc Zyngier
2020-10-30 16:40 ` [PATCH 07/12] KVM: arm64: Use fallback mapping sizes for contiguous huge page sizes Marc Zyngier
2020-10-30 16:40 ` [PATCH 08/12] KVM: arm64: Force PTE mapping on fault resulting in a device mapping Marc Zyngier
2020-10-30 16:40 ` [PATCH 09/12] KVM: arm64: Factor out is_{vhe,nvhe}_hyp_code() Marc Zyngier
2020-10-30 16:40 ` [PATCH 10/12] arm64: cpufeature: reorder cpus_have_{const, final}_cap() Marc Zyngier
2020-10-30 16:40 ` [PATCH 11/12] arm64: cpufeature: upgrade hyp caps to final Marc Zyngier
2020-10-30 16:40 ` Marc Zyngier [this message]
2020-10-31 14:35 ` [GIT PULL] KVM/arm64 fixes for 5.10, take #1 Paolo Bonzini
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20201030164017.244287-13-maz@kernel.org \
--to=maz@kernel.org \
--cc=dbrazdil@google.com \
--cc=gshan@redhat.com \
--cc=james.morse@arm.com \
--cc=julien.thierry.kdev@gmail.com \
--cc=kernel-team@android.com \
--cc=kvm@vger.kernel.org \
--cc=kvmarm@lists.cs.columbia.edu \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=mark.rutland@arm.com \
--cc=pbonzini@redhat.com \
--cc=qais.yousef@arm.com \
--cc=qperret@google.com \
--cc=sashukla@nvidia.com \
--cc=suzuki.poulose@arm.com \
--cc=vladimir.murzin@arm.com \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).