From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A39B0C00A89 for ; Mon, 2 Nov 2020 11:45:26 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 30B4C21556 for ; Mon, 2 Nov 2020 11:45:26 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="gLsOqo8+" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 30B4C21556 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=1duKROx98YGY9hoZJcfNM8G7PhpGTCJdpVowjmTkNqw=; b=gLsOqo8+kmqnNDnoZlT7HNAe8 EyLgtx/l2PfbdBPUX8Wvs5002FuHr+oSCMF6C4dNgHMdjrL2jF9pKIePUO1bnoq1/clNfnTKLZt02 AkFmyREfEfOYaCESzPJWq30Bz/nfMVUTuo7QDFLDhGSGdBeWCeM5QW+ciLNcD+lKjGWipI1R5WxOf LN9usNVXv0I+8J+K1EUBFRadHk6IhBKJvUf4l7LOgBt5VFZuNkiAZv7L1P5zmKrXh9vfcj8klSuE2 WmZuxAqyepnXVBEU7zCbMRQvLaP7qmM5LxuaFDzm/2KAjBxoX71GrErJsPeQZc1Y6LUDRRD9LTWXH X0iymw92Q==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kZYGd-00071d-CP; Mon, 02 Nov 2020 11:44:55 +0000 Received: from mail.kernel.org ([198.145.29.99]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kZYGa-00070p-L1 for linux-arm-kernel@lists.infradead.org; Mon, 02 Nov 2020 11:44:53 +0000 Received: from gaia (unknown [95.145.162.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 5F59321556; Mon, 2 Nov 2020 11:44:48 +0000 (UTC) Date: Mon, 2 Nov 2020 11:44:45 +0000 From: Catalin Marinas To: Will Deacon Subject: Re: [PATCH 2/6] arm64: Allow mismatched 32-bit EL0 support Message-ID: <20201102114444.GC21082@gaia> References: <20201028111204.GB13345@gaia> <20201028111713.GA27927@willie-the-truck> <20201028112206.GD13345@gaia> <20201028112343.GD27927@willie-the-truck> <20201028114945.GE13345@gaia> <20201028124049.GC28091@willie-the-truck> <20201028185620.GK13345@gaia> <20201029222048.GD31375@willie-the-truck> <20201030111846.GC23196@gaia> <20201030161353.GC32582@willie-the-truck> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20201030161353.GC32582@willie-the-truck> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201102_064452_940132_6B83EC4C X-CRM114-Status: GOOD ( 33.57 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "linux-arch@vger.kernel.org" , "kernel-team@android.com" , Peter Zijlstra , Marc Zyngier , Qais Yousef , Greg Kroah-Hartman , Suren Baghdasaryan , Morten Rasmussen , "linux-arm-kernel@lists.infradead.org" Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Oct 30, 2020 at 04:13:53PM +0000, Will Deacon wrote: > On Fri, Oct 30, 2020 at 11:18:47AM +0000, Catalin Marinas wrote: > > On Thu, Oct 29, 2020 at 10:20:48PM +0000, Will Deacon wrote: > > > This means that if the first 32-bit-capable core is onlined late, then > > > it will only get the base capabilities, but I think that's fine and > > > consistent with our overall handling of hwcaps (which cannot appear > > > dynamically to userspace). > > > > Yes but such bare 32-bit mode is entirely useless and I don't think we > > should even pretend we have 32-bit. The compat hwcaps here would be > > "half thumb fastmult edsp tls idiva idivt lpae evtstrm", statically > > filled in. It's missing major bits like "vfp" and "neon" which are > > necessary for the general purpose 32-bit EABI. > > So? If we found such a CPU during boot, would we refuse to online it because > we consider it "entirely useless"? No! We _do_ online it but as a 64-bit only CPU if there were no early 32-bit CPUs since we are not updating the compat hwcaps anyway (and that's handled automatically by WEAK_LOCAL_CPU_FEATURE; we do this in a few places already). > That said, given that it's _very_ > likely for the late CPUs to support vfp and neon, we could set those caps > speculatively if the 64-bit cores have fpsimd (late onlining would be > prevented for cores lacking those). Does the architecture allow you to > implement both AArch64 and AArch32 at EL0, but only have fpsimd for AArch64? Probably not but I don't want to butcher the cpufeature support further and have compat hwcaps derived from ID_AA64* regs. I find this hack even worse and I'd rather live with the partial hwcap information (and hope user space doesn't read hwcaps anyway ;)). I don't see why we should change this code further when the requirement to the mobile vendors is to simply allow a 32-bit CPU to come up early. > > As I said above, I think we would be even more inconsistent w.r.t. > > HWCAPs if we require at least one early AArch32-capable CPU, otherwise > > don't expose 32-bit at all. I don't see what we gain by allowing all > > 32-bit CPUs to come in late, other than maybe saving an entry in the > > cpufeature array. > > It's a combination of there not being a good reason to prevent the > late-onlining and not gaining anything from the additional feature (I've > already shown why it doesn't help with the vast majority of callsites). I underlined above, this is not about preventing late onlining, only preventing late 32-bit support. Late AArch32-capable CPUs will be onlined just fine, only that if we haven't got any prior 32-bit CPU, we no longer report the feature and the sysfs mask. All I'm asking is something along the lines of the diff below instead of forcing ARM64_HAS_32BIT_EL0 always on (untested): diff --git a/arch/arm64/include/asm/cpucaps.h b/arch/arm64/include/asm/cpucaps.h index 42868dbd29fd..f73631aeedae 100644 --- a/arch/arm64/include/asm/cpucaps.h +++ b/arch/arm64/include/asm/cpucaps.h @@ -65,7 +65,8 @@ #define ARM64_HAS_ARMv8_4_TTL 55 #define ARM64_HAS_TLB_RANGE 56 #define ARM64_MTE 57 +#define ARM64_HAS_WEAK_32BIT_EL0 58 -#define ARM64_NCAPS 58 +#define ARM64_NCAPS 59 #endif /* __ASM_CPUCAPS_H */ diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h index f7e7144af174..f8da673a9a20 100644 --- a/arch/arm64/include/asm/cpufeature.h +++ b/arch/arm64/include/asm/cpufeature.h @@ -584,7 +584,16 @@ static inline bool cpu_supports_mixed_endian_el0(void) static inline bool system_supports_32bit_el0(void) { - return cpus_have_const_cap(ARM64_HAS_32BIT_EL0); + return __allow_mismatched_32bit_el0 ? + cpus_have_const_cap(ARM64_HAS_WEAK_32BIT_EL0) : + cpus_have_const_cap(ARM64_HAS_32BIT_EL0) +} + +static inline bool system_has_mismatched_32bit_el0(void) +{ + return __allow_mismatched_32bit_el0 && + cpus_have_const_cap(ARM64_HAS_WEAK_32BIT_EL0) && + !cpus_have_const_cap(ARM64_HAS_32BIT_EL0) } static inline bool system_supports_4kb_granule(void) diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index dcc165b3fc04..fd7554602c5e 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -1809,6 +1809,15 @@ static const struct arm64_cpu_capabilities arm64_features[] = { .field_pos = ID_AA64PFR0_EL0_SHIFT, .min_field_value = ID_AA64PFR0_EL0_32BIT_64BIT, }, + { + .capability = ARM64_HAS_WEAK_32BIT_EL0, + .type = ARM64_CPUCAP_WEAK_LOCAL_CPU_FEATURE, + .matches = has_cpuid_feature, + .sys_reg = SYS_ID_AA64PFR0_EL1, + .sign = FTR_UNSIGNED, + .field_pos = ID_AA64PFR0_EL0_SHIFT, + .min_field_value = ID_AA64PFR0_EL0_32BIT_64BIT, + }, #ifdef CONFIG_KVM { .desc = "32-bit EL1 Support", _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel