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From: Masayoshi Mizuma <msys.mizuma@gmail.com>
To: Sumit Garg <sumit.garg@linaro.org>
Cc: mark.rutland@arm.com, daniel.thompson@linaro.org,
	tsbogend@alpha.franken.de, linux-kernel@vger.kernel.org,
	jason@lakedaemon.net, ito-yuichi@fujitsu.com, maz@kernel.org,
	x86@kernel.org, linux@armlinux.org.uk, dianders@chromium.org,
	jason.wessel@windriver.com, mingo@redhat.com, bp@alien8.de,
	mpe@ellerman.id.au, catalin.marinas@arm.com,
	kgdb-bugreport@lists.sourceforge.net, tglx@linutronix.de,
	julien.thierry.kdev@gmail.com, will@kernel.org,
	davem@davemloft.net, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v7 1/7] arm64: Add framework to turn IPI as NMI
Date: Mon, 2 Nov 2020 10:33:49 -0500	[thread overview]
Message-ID: <20201102153349.fay4f5iam76gfapu@gabell> (raw)
In-Reply-To: <1604317487-14543-2-git-send-email-sumit.garg@linaro.org>

On Mon, Nov 02, 2020 at 05:14:41PM +0530, Sumit Garg wrote:
> Introduce framework to turn an IPI as NMI using pseudo NMIs. The main
> motivation for this feature is to have an IPI that can be leveraged to
> invoke NMI functions on other CPUs.
> 
> And current prospective users are NMI backtrace and KGDB CPUs round-up
> whose support is added via future patches.
> 
> Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
> ---
>  arch/arm64/include/asm/nmi.h | 17 ++++++++++++
>  arch/arm64/kernel/Makefile   |  2 +-
>  arch/arm64/kernel/ipi_nmi.c  | 65 ++++++++++++++++++++++++++++++++++++++++++++
>  3 files changed, 83 insertions(+), 1 deletion(-)
>  create mode 100644 arch/arm64/include/asm/nmi.h
>  create mode 100644 arch/arm64/kernel/ipi_nmi.c
> 
> diff --git a/arch/arm64/include/asm/nmi.h b/arch/arm64/include/asm/nmi.h
> new file mode 100644
> index 0000000..4cd14b6
> --- /dev/null
> +++ b/arch/arm64/include/asm/nmi.h
> @@ -0,0 +1,17 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +#ifndef __ASM_NMI_H
> +#define __ASM_NMI_H
> +
> +#ifndef __ASSEMBLER__
> +
> +#include <linux/cpumask.h>
> +
> +extern bool arm64_supports_nmi(void);
> +extern void arm64_send_nmi(cpumask_t *mask);
> +
> +void set_smp_dynamic_ipi(int ipi);
> +void dynamic_ipi_setup(int cpu);
> +void dynamic_ipi_teardown(int cpu);
> +
> +#endif /* !__ASSEMBLER__ */
> +#endif
> diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile
> index bbaf0bc..525a1e0 100644
> --- a/arch/arm64/kernel/Makefile
> +++ b/arch/arm64/kernel/Makefile
> @@ -17,7 +17,7 @@ obj-y			:= debug-monitors.o entry.o irq.o fpsimd.o		\
>  			   return_address.o cpuinfo.o cpu_errata.o		\
>  			   cpufeature.o alternative.o cacheinfo.o		\
>  			   smp.o smp_spin_table.o topology.o smccc-call.o	\
> -			   syscall.o proton-pack.o
> +			   syscall.o proton-pack.o ipi_nmi.o
>  
>  targets			+= efi-entry.o
>  
> diff --git a/arch/arm64/kernel/ipi_nmi.c b/arch/arm64/kernel/ipi_nmi.c
> new file mode 100644
> index 0000000..a945dcf
> --- /dev/null
> +++ b/arch/arm64/kernel/ipi_nmi.c
> @@ -0,0 +1,65 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * NMI support for IPIs
> + *
> + * Copyright (C) 2020 Linaro Limited
> + * Author: Sumit Garg <sumit.garg@linaro.org>
> + */
> +
> +#include <linux/interrupt.h>
> +#include <linux/irq.h>
> +#include <linux/smp.h>
> +
> +#include <asm/nmi.h>
> +
> +static struct irq_desc *ipi_nmi_desc __read_mostly;
> +static int ipi_nmi_id __read_mostly;
> +
> +bool arm64_supports_nmi(void)
> +{
> +	if (ipi_nmi_desc)
> +		return true;
> +
> +	return false;
> +}
> +
> +void arm64_send_nmi(cpumask_t *mask)
> +{
> +	if (WARN_ON_ONCE(!ipi_nmi_desc))
> +		return;
> +
> +	__ipi_send_mask(ipi_nmi_desc, mask);
> +}
> +
> +static irqreturn_t ipi_nmi_handler(int irq, void *data)
> +{
> +	/* nop, NMI handlers for special features can be added here. */
> +
> +	return IRQ_NONE;
> +}
> +

> +void dynamic_ipi_setup(int cpu)

cpu isn't used here, so void is better?

void dynamic_ipi_setup(void)

> +{
> +	if (!ipi_nmi_desc)
> +		return;
> +
> +	if (!prepare_percpu_nmi(ipi_nmi_id))
> +		enable_percpu_nmi(ipi_nmi_id, IRQ_TYPE_NONE);
> +}
> +

> +void dynamic_ipi_teardown(int cpu)

Same as here:
void dynamic_ipi_teardown(void)

> +{
> +	if (!ipi_nmi_desc)
> +		return;
> +
> +	disable_percpu_nmi(ipi_nmi_id);
> +	teardown_percpu_nmi(ipi_nmi_id);
> +}
> +
> +void __init set_smp_dynamic_ipi(int ipi)
> +{
> +	if (!request_percpu_nmi(ipi, ipi_nmi_handler, "IPI", &cpu_number)) {
> +		ipi_nmi_desc = irq_to_desc(ipi);
> +		ipi_nmi_id = ipi;
> +	}
> +}
> -- 

Otherwise, looks good to me. Please feel free to add:

	Reviewed-by: Masayoshi Mizuma <m.mizuma@jp.fujitsu.com>

Thanks,
Masa

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  reply	other threads:[~2020-11-02 15:34 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-02 11:44 [PATCH v7 0/7] arm64: Add framework to turn an IPI as NMI Sumit Garg
2020-11-02 11:44 ` [PATCH v7 1/7] arm64: Add framework to turn " Sumit Garg
2020-11-02 15:33   ` Masayoshi Mizuma [this message]
2020-11-04 12:48     ` Sumit Garg
2020-11-02 11:44 ` [PATCH v7 2/7] irqchip/gic-v3: Enable support for SGIs to act as NMIs Sumit Garg
2020-11-02 16:17   ` Masayoshi Mizuma
2020-11-18 11:54   ` ito-yuichi
2020-11-02 11:44 ` [PATCH v7 3/7] arm64: smp: Assign and setup an IPI as NMI Sumit Garg
2020-11-02 16:19   ` Masayoshi Mizuma
2020-11-02 11:44 ` [PATCH v7 4/7] nmi: backtrace: Allow runtime arch specific override Sumit Garg
2021-01-05 10:32   ` Sumit Garg
2020-11-02 11:44 ` [PATCH v7 5/7] arm64: ipi_nmi: Add support for NMI backtrace Sumit Garg
2020-11-02 16:21   ` Masayoshi Mizuma
2020-11-02 11:44 ` [PATCH v7 6/7] kgdb: Expose default CPUs roundup fallback mechanism Sumit Garg
2020-11-02 11:44 ` [PATCH v7 7/7] arm64: kgdb: Roundup cpus using IPI as NMI Sumit Garg
2021-06-25 14:54   ` Chen-Yu Tsai
2021-01-05 10:34 ` [PATCH v7 0/7] arm64: Add framework to turn an " Sumit Garg
2021-01-05 10:43   ` Marc Zyngier
2021-07-07  6:03     ` Sumit Garg
2021-06-25 14:56 ` Chen-Yu Tsai
2021-07-07  5:59   ` Sumit Garg
2022-01-12 19:31     ` Masayoshi Mizuma
2022-01-13 11:00       ` Sumit Garg

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