From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5B437C388F2 for ; Tue, 3 Nov 2020 18:34:01 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E8C1220786 for ; Tue, 3 Nov 2020 18:34:00 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="syi8RY2c" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E8C1220786 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=wuIqwwwu6yIk5rkfayYZ2lpDPTB9pnBoIMiXliw87OM=; b=syi8RY2ct/ZFmnWYFSF6Z4ufG Rp0vxpnyP2d4IRjSrYSMQbAshzME2KRg4QPbv2u0mNrbhELOebq/rGazHK41IkWxup/fDKo9HQIZO 5/zHtFSFekoyWPCgErVOlclOqLFsRDXB8HnwtyvmFu73jNppfXAEOUvrDgnl+bUK6Ir5d7pmtNu51 EaSKXpYtYXsPj/R01lCZX0epSZuStzE8DTw/k0UVA/7YWcwP5YycI/PNTujt4T4wjjIVML1x6wb2Q wgR8MDn30V3AIIms6GZ6IHQ8DGiQ8BCSCEUt7fo94AFFOeoOcxCcpQOe6xw8DbKSijqgt3KgBDVXj vQJrLrPXw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1ka17e-0006VW-D6; Tue, 03 Nov 2020 18:33:34 +0000 Received: from mail.kernel.org ([198.145.29.99]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1ka17b-0006Uf-Ey for linux-arm-kernel@lists.infradead.org; Tue, 03 Nov 2020 18:33:32 +0000 Received: from C02TF0J2HF1T.local (unknown [2.26.170.190]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 9CF0D2076E; Tue, 3 Nov 2020 18:33:24 +0000 (UTC) Date: Tue, 3 Nov 2020 18:33:21 +0000 From: Catalin Marinas To: Peter Collingbourne Subject: Re: [PATCH v13 8/8] arm64: expose FAR_EL1 tag bits in siginfo Message-ID: <20201103183321.GB81026@C02TF0J2HF1T.local> References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201103_133331_583013_897F521A X-CRM114-Status: GOOD ( 21.41 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Linux ARM , Andrey Konovalov , Helge Deller , Kevin Brodsky , Oleg Nesterov , "James E.J. Bottomley" , Kostya Serebryany , "Eric W. Biederman" , linux-api@vger.kernel.org, David Spickett , Vincenzo Frascino , Will Deacon , Dave Martin , Evgenii Stepanov , Richard Henderson Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Nov 02, 2020 at 08:09:44PM -0800, Peter Collingbourne wrote: > The kernel currently clears the tag bits (i.e. bits 56-63) in the fault > address exposed via siginfo.si_addr and sigcontext.fault_address. However, > the tag bits may be needed by tools in order to accurately diagnose > memory errors, such as HWASan [1] or future tools based on the Memory > Tagging Extension (MTE). > > We should not stop clearing these bits in the existing fault address > fields, because there may be existing userspace applications that are > expecting the tag bits to be cleared. Instead, create a new pair of > union fields in siginfo._sigfault, and store the tag bits of FAR_EL1 > there, together with a mask specifying which bits are valid. This comment is slightly confusing as they are not union fields in _sigfault. > diff --git a/include/uapi/asm-generic/siginfo.h b/include/uapi/asm-generic/siginfo.h > index f43778355b77..2b2ed0394457 100644 > --- a/include/uapi/asm-generic/siginfo.h > +++ b/include/uapi/asm-generic/siginfo.h > @@ -94,6 +94,8 @@ union __sifields { > void *_pad[6]; > }; > __u32 _faultflags; > + unsigned long _addr_tag_bits; > + unsigned long _addr_tag_bits_mask; > } _sigfault; Can we not actually add these as a struct to the union? Do we expect the other fields to be valid? Also there's a 32-bit gap I mentioned on the previous patch between _faultflags and _addr_tag_bits. That said, I wonder whether we could solve this for MTE without new fields by always setting the tag in si_addr when si_code is SEGV_MTE*. Alternatively, we could add a prctl() bit to require tagged si_addr. Well, I don't mind the _addr_tag_bits* fields if they are part of the union and keep si_addr intact. -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel