From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 32BC8C2D0A3 for ; Wed, 4 Nov 2020 14:56:54 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9B5222224E for ; Wed, 4 Nov 2020 14:56:53 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="LGSoD8r8" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9B5222224E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=A7MuLvt046BkE2dmZdYU9D9R+nIewggYjHfZBn7BmzU=; b=LGSoD8r8MZhsscJtM4lIPmcza nHq1ggU7njD+MxScqH0Z5+O0Jl10Y7JGn45oWTxS8wstbL6LpnHA2PbJ+y4EpGu2SA51w2y35YHhX 0NX0F3GrnzTfYpzym3sx52KlHgP36bTmNa9GQO83ksNNBrp1xDsYPgkaalhacViLY3dlOdiesaEpt Qm2Z6WaL3edrBgAIOzoMxcIPDB73mhLuvJpGsYKJb/wPcqcFVO09hefLnJSGISGQgeU3OkW8Y/rd/ xLLUrAXDsbUhRlJBIval/UlvgiLJSPJa+4y4Hp5BWrcb5d/jnahbn8YZi/7LJU5bY2zUK0WcKNkFZ XTpxff1JA==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kaKCs-0007rf-KI; Wed, 04 Nov 2020 14:56:14 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kaKCp-0007qE-GC for linux-arm-kernel@lists.infradead.org; Wed, 04 Nov 2020 14:56:12 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C1F0E139F; Wed, 4 Nov 2020 06:56:09 -0800 (PST) Received: from C02TD0UTHF1T.local (unknown [10.57.57.109]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id DBD8C3F719; Wed, 4 Nov 2020 06:56:03 -0800 (PST) Date: Wed, 4 Nov 2020 14:56:01 +0000 From: Mark Rutland To: Marco Elver Subject: Re: [PATCH v7 3/9] arm64, kfence: enable KFENCE for ARM64 Message-ID: <20201104145601.GB7577@C02TD0UTHF1T.local> References: <20201103175841.3495947-1-elver@google.com> <20201103175841.3495947-4-elver@google.com> <20201104130111.GA7577@C02TD0UTHF1T.local> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201104_095611_672388_F68045E4 X-CRM114-Status: GOOD ( 31.64 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Hillf Danton , "open list:DOCUMENTATION" , Peter Zijlstra , Catalin Marinas , Dave Hansen , Linux Memory Management List , Eric Dumazet , Alexander Potapenko , "H. Peter Anvin" , Christoph Lameter , Will Deacon , SeongJae Park , Jonathan Corbet , the arch/x86 maintainers , kasan-dev , Ingo Molnar , Vlastimil Babka , David Rientjes , Andrey Ryabinin , =?utf-8?B?SsO2cm4=?= Engel , Kees Cook , "Paul E. McKenney" , Jann Horn , Andrey Konovalov , Borislav Petkov , Andy Lutomirski , Jonathan Cameron , Thomas Gleixner , Andrew Morton , Dmitry Vyukov , Linux ARM , Greg Kroah-Hartman , LKML , Pekka Enberg , Joonsoo Kim Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Nov 04, 2020 at 03:23:48PM +0100, Marco Elver wrote: > On Wed, 4 Nov 2020 at 14:06, Mark Rutland wrote: > > On Tue, Nov 03, 2020 at 06:58:35PM +0100, Marco Elver wrote: > > There is one thing that I thing we should improve as a subsequent > > cleanup, but I don't think that should block this as-is. > > > > > +#define KFENCE_SKIP_ARCH_FAULT_HANDLER "el1_sync" > > > > IIUC, the core kfence code is using this to figure out where to trace > > from when there's a fault taken on an access to a protected page. > > Correct. > > > It would be better if the arch code passed the exception's pt_regs into > > the kfence fault handler, and the kfence began the trace began from > > there. That would also allow for dumping the exception registers which > > can help with debugging (e.g. figuring out how the address was derived > > when it's calculated from multiple source registers). That would also be > > a bit more robust to changes in an architectures' exception handling > > code. > > Good idea, thanks. I guess there's no reason to not want to always > skip to instruction_pointer(regs)? I don't think we need the exception handling gunk in the trace, but note that you'd need to use stack_trace_save_regs(regs, ...) directly, rather than using stack_trace_save() and skipping based on instruction_pointer(regs). Otherwise, if the fault was somewhere in an exception handler, and we invoked the same function on the path to the kfence fault handler we might cut the trace at the wrong point. > In which case I can prepare a patch to make this change. If this > should go into a v8, please let me know. But it'd be easier as a > subsequent patch as you say, given it'll be easier to review and these > patches are in -mm now. I think it'd make more sense as a subsequent change, since it's liable to need a cycle or two of review, and I don't think it should block the rest of the series. Thanks, Mark. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel