From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C2A98C4741F for ; Thu, 5 Nov 2020 12:57:44 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 50DF9206D4 for ; Thu, 5 Nov 2020 12:57:44 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="FH3Kfo91" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 50DF9206D4 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:MIME-Version:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:References:In-Reply-To:Message-Id:Date:Subject:To: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=pB6qdzNoePgaXiUIiqTVnYvr2ZG4lPRYRIM58silmwc=; b=FH3Kfo91rMNMDJEUsnA0zqV9sc f7iqrZfF/sxetenNJz3VZgTsvhdh2DjTKAXltukp1o0ztUTo+tsxqPMh4AuZ69yWfCVMFd6vG3TVO bqpTcyLqnYnEsKLplOvz5ORgQd75T7KFiKsUJeGFAhZb5b4h5tMF7jd9xOZumCdy1B5pa2UZU3ghM l+W+OfWjHet3SP6XFYXwiErZEx6KOzoEe9lh+3WiDjQHLFYr4BmgIE2eszzxFpQpoQi5bx2qzBB+4 F8DZ+V7O18vhkqTPmXaWZC7FKHwYbEkHdYh441lWCFToAZTK7YSevxnxP8CXzhd5q9ocz1BkB/8KY Yp7emSOA==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kaepM-0004sP-6W; Thu, 05 Nov 2020 12:57:20 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kaepD-0004ou-Nf for linux-arm-kernel@lists.infradead.org; Thu, 05 Nov 2020 12:57:12 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 13DF11529; Thu, 5 Nov 2020 04:57:11 -0800 (PST) Received: from donnerap.arm.com (donnerap.cambridge.arm.com [10.1.195.35]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 6A19B3F719; Thu, 5 Nov 2020 04:57:09 -0800 (PST) From: Andre Przywara To: Will Deacon , Catalin Marinas , Ard Biesheuvel , Russell King Subject: [PATCH v2 3/5] ARM: implement support for SMCCC TRNG entropy source Date: Thu, 5 Nov 2020 12:56:54 +0000 Message-Id: <20201105125656.25259-4-andre.przywara@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201105125656.25259-1-andre.przywara@arm.com> References: <20201105125656.25259-1-andre.przywara@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201105_075711_951629_8B742523 X-CRM114-Status: GOOD ( 18.44 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Lorenzo Pieralisi , Linus Walleij , linux-kernel@vger.kernel.org, Mark Brown , Sudeep Holla , kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Ard Biesheuvel Implement arch_get_random_seed_*() for ARM based on the firmware or hypervisor provided entropy source described in ARM DEN0098. This will make the kernel's random number generator consume entropy provided by this interface, at early boot, and periodically at runtime when reseeding. Cc: Linus Walleij Cc: Russell King Signed-off-by: Ard Biesheuvel [Andre: rework to be initialised by the SMCCC firmware driver] Signed-off-by: Andre Przywara --- arch/arm/Kconfig | 4 ++ arch/arm/include/asm/archrandom.h | 64 +++++++++++++++++++++++++++++++ 2 files changed, 68 insertions(+) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index fe2f17eb2b50..06fda4f954fd 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1667,6 +1667,10 @@ config STACKPROTECTOR_PER_TASK Enable this option to switch to a different method that uses a different canary value for each task. +config ARCH_RANDOM + def_bool y + depends on HAVE_ARM_SMCCC + endmenu menu "Boot options" diff --git a/arch/arm/include/asm/archrandom.h b/arch/arm/include/asm/archrandom.h index a8e84ca5c2ee..f3e96a5b65f8 100644 --- a/arch/arm/include/asm/archrandom.h +++ b/arch/arm/include/asm/archrandom.h @@ -2,9 +2,73 @@ #ifndef _ASM_ARCHRANDOM_H #define _ASM_ARCHRANDOM_H +#ifdef CONFIG_ARCH_RANDOM + +#include +#include + +#define ARM_SMCCC_TRNG_MIN_VERSION 0x10000UL + +extern bool smccc_trng_available; + +static inline bool __init smccc_probe_trng(void) +{ + struct arm_smccc_res res; + + arm_smccc_1_1_invoke(ARM_SMCCC_TRNG_VERSION, &res); + if ((s32)res.a0 < 0) + return false; + if (res.a0 >= ARM_SMCCC_TRNG_MIN_VERSION) { + /* double check that the 32-bit flavor is available */ + arm_smccc_1_1_invoke(ARM_SMCCC_TRNG_FEATURES, + ARM_SMCCC_TRNG_RND32, + &res); + if ((s32)res.a0 >= 0) + return true; + } + + return false; +} + +static inline bool __must_check arch_get_random_long(unsigned long *v) +{ + return false; +} + +static inline bool __must_check arch_get_random_int(unsigned int *v) +{ + return false; +} + +static inline bool __must_check arch_get_random_seed_long(unsigned long *v) +{ + struct arm_smccc_res res; + + if (smccc_trng_available) { + arm_smccc_1_1_invoke(ARM_SMCCC_TRNG_RND32, 8 * sizeof(*v), &res); + + if (res.a0 != 0) + return false; + + *v = res.a3; + return true; + } + + return false; +} + +static inline bool __must_check arch_get_random_seed_int(unsigned int *v) +{ + return arch_get_random_seed_long((unsigned long *)v); +} + + +#else /* !CONFIG_ARCH_RANDOM */ + static inline bool __init smccc_probe_trng(void) { return false; } +#endif /* CONFIG_ARCH_RANDOM */ #endif /* _ASM_ARCHRANDOM_H */ -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel