From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5071CC4742C for ; Thu, 5 Nov 2020 14:04:38 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id AD24B2074B for ; Thu, 5 Nov 2020 14:04:37 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="ul6n14hH" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org AD24B2074B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=G7BcY/zTkLewa/EA3i3dS7NybqSojIWXn8eRmFm7E1w=; b=ul6n14hHJp/d3ROzDmzDrhRS0 VHAZ0BGqJETU3ktydtDpqmVuRow5p1PvUQ4RH0JBGk7jEgq/18x4ORh3ygT6AZWkYKlZRFCXVEARG EEiAOzS6gBqWPlr35Chtvd7AukJHFT3rQLe0HrNV+uPgBPIWms82T11lI6dilKEmCi5HEUg7tA40O 8FrOxPDnRDUY6oRZUAk9gQ+MzrPbzH5PHwIoEM9jsdtP2oj+Ts7wHNW4EHFVTYKc0SNMP8zZr7vuU x9xJFLevJl3N1viEFnzunf9Yu7QShG7gWluythcRDob+7k3PRM5F2ynSclXlRa0i2KJbV2eMVcRd9 83I218jbA==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kafrR-00064t-Tv; Thu, 05 Nov 2020 14:03:33 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kafrM-00063B-RQ for linux-arm-kernel@lists.infradead.org; Thu, 05 Nov 2020 14:03:30 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id ED82614BF; Thu, 5 Nov 2020 06:03:27 -0800 (PST) Received: from C02TD0UTHF1T.local (unknown [10.57.58.72]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 78F9C3F719; Thu, 5 Nov 2020 06:03:25 -0800 (PST) Date: Thu, 5 Nov 2020 14:03:22 +0000 From: Mark Rutland To: Mark Brown Subject: Re: [PATCH v2 4/5] arm64: Add support for SMCCC TRNG entropy source Message-ID: <20201105140322.GH82102@C02TD0UTHF1T.local> References: <20201105125656.25259-1-andre.przywara@arm.com> <20201105125656.25259-5-andre.przywara@arm.com> <20201105134142.GA4856@sirena.org.uk> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20201105134142.GA4856@sirena.org.uk> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201105_090329_032775_61271445 X-CRM114-Status: GOOD ( 17.11 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lorenzo Pieralisi , linux-kernel@vger.kernel.org, Andre Przywara , Linus Walleij , Sudeep Holla , Russell King , kvmarm@lists.cs.columbia.edu, Catalin Marinas , Will Deacon , Ard Biesheuvel , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Nov 05, 2020 at 01:41:42PM +0000, Mark Brown wrote: > On Thu, Nov 05, 2020 at 12:56:55PM +0000, Andre Przywara wrote: > > > static inline bool __must_check arch_get_random_seed_int(unsigned int *v) > > { > > + struct arm_smccc_res res; > > unsigned long val; > > - bool ok = arch_get_random_seed_long(&val); > > > > - *v = val; > > - return ok; > > + if (cpus_have_const_cap(ARM64_HAS_RNG)) { > > + if (arch_get_random_seed_long(&val)) { > > + *v = val; > > + return true; > > + } > > + return false; > > + } > > It isn't obvious to me why we don't fall through to trying the SMCCC > TRNG here if for some reason the v8.5-RNG didn't give us something. > Definitely an obscure possibility but still... I think it's better to assume that if we have a HW RNG and it's not giving us entropy, it's not worthwhile trapping to the host, which might encounter the exact same issue. I'd rather we have one RNG source that we trust works, and use that exclusively. That said, I'm not sure it's great to plumb this under the arch_get_random*() interfaces, e.g. given this measn that add_interrupt_randomness() will end up trapping to the host all the time when it calls arch_get_random_seed_long(). Is there an existing interface for "slow" runtime entropy that we can plumb this into instead? Thanks, Mark. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel