From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 24515C2D0A3 for ; Fri, 6 Nov 2020 19:39:16 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7CC8B21D46 for ; Fri, 6 Nov 2020 19:39:15 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="b8dUpCin"; dkim=fail reason="signature verification failed" (1024-bit key) header.d=kernel.org header.i=@kernel.org header.b="vRbYj8Fg" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7CC8B21D46 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:To:From: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=mwoz1gYD52iUzoBG71ONKlivsvRvUqwIaZ+r1vsZGU4=; b=b8dUpCinnjbPCz5T7+R+56VWg7 6roAVPOGkS+C0dpOo4ej6+eZbpjcR2XujUfqY612tOuU8i16E2a2+mYZQLVcMRuxhqlrFzqPMm2UP WNt9a/fAzXrb25ifY02KUGH5/jv+LzpbNfhNJyMISeqw5dgqI0mIUqy1t/yNsuBCby00hN7HFgzFz X+A81+osOOweMdJhGALmlhzBvbSz6i2o7O02s+XKmqO5LOLsdHvBrAyf9wruc4Q6VZh1EIpAWmoJ8 1kPtfOYoVlM8hJ+EHR0WqLE0pUaJpklmMfmhOQ0HGD6bbOZBh8Hk3Yv8pcnsxnxOCUhyc3daQdmc2 ubCul8jg==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kb7Yh-0001cg-4j; Fri, 06 Nov 2020 19:38:03 +0000 Received: from mail.kernel.org ([198.145.29.99]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kb7Yc-0001bv-VR for linux-arm-kernel@lists.infradead.org; Fri, 06 Nov 2020 19:38:00 +0000 Received: from localhost (fw-tnat.cambridge.arm.com [217.140.96.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 206CC21D46; Fri, 6 Nov 2020 19:37:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1604691477; bh=MNoHibeSs8pBwS5MZocZdQO3KkK9YrtTcY9riPq5nd4=; h=From:To:Cc:Subject:Date:From; b=vRbYj8FgJkCIVKhH8u4NPBRnOvGIfNKNsGXMJBuyCulORO1deRvkmOEJ71LOcmo7U pqa3Da1DNW5Vkbi+HuUhMD7yNTfK1SLUliq6FLzKFYYLE901kfLuLbw1L8zZ1v+NMG QOvvLZGmfg625xXvJL3KiHp65sO9klfqJSquRvdo= From: Mark Brown To: Catalin Marinas , Will Deacon Subject: [PATCH v5 0/2] arm64/sve: First steps towards optimizing syscalls Date: Fri, 6 Nov 2020 19:35:51 +0000 Message-Id: <20201106193553.22946-1-broonie@kernel.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201106_143759_174012_10623EAA X-CRM114-Status: GOOD ( 22.21 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Julien Grall , Zhang Lei , Julien Grall , Mark Brown , Dave Martin , linux-arm-kernel@lists.infradead.org, Daniel Kiss Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This is a first attempt to optimize the syscall path when the user application uses SVE. The patch series was originally written by Julien Grall but has been left for a long time, I've updated it to current kernels and tried to address the pending review feedback that I found (which was mostly documentation issues). Per the syscall ABI, SVE registers will be unknown after a syscall. In practice, the kernel will disable SVE and the registers will be zeroed (except the first 128-bits of each vector) on the next SVE instruction. In a workload mixing SVE and syscalls, this will result to 2 entry/exit to the kernel per syscall as we trap on the first SVE access after the syscall. This series aims to avoid the second entry/exit by zeroing the SVE registers on syscall return with a twist when the task will get rescheduled. This implementation will have an impact on application using SVE only once. SVE will now be turned on until the application terminates (unless it is disabled via ptrace). Cleverer strategies for choosing between SVE and FPSIMD context switching are possible (see fpu_counter for SH in mainline, or [1]), but it is difficult to assess the benefit right now. We could improve the behaviour in the future as a selection of mature hardware platforsm emerges that we can benchmark. It is also possible to optimize the case when the SVE vector-length is 128-bit (i.e the same size as the FPSIMD vectors). This could be explored in the future. If merged this will need a renumbering of TIF_SVE_NEEDS_FLUSH and other TIF flags due to collision with the addition of TIF_NOTIFY_SIGNAL in -next, this isn't an issue with the current base. The flag is used in an immediate argument for an and instruction in entry.S so needs a low number, I can provide a patch for this I've been testing if needed. v5: - Rebase onto v5.10-rc2. - Explicitly support the case where TIF_SVE and TIF_SVE_NEEDS_FLUSH are set simultaneously, though this is not currently expected to happen. - Extensively revised the documentation for TIF_SVE and TIF_SVE_NEEDS_FLUSH to hopefully make things more clear together with the above, I hope this addresses the comments on the prior version but it really needs fresh eyes to tell if that's actually the case. - Make comments in ptrace.c more precise. - Remove some redundant checks for system_has_sve(). v4: - Rebase onto v5.9-rc2 - Address review comments from Dave Martin, mostly documentation but also some refactorings to ensure we don't check capabilities multiple times and the addition of some WARN_ONs to make sure assumptions we are making about what TIF_ flags can be set when are true. v3: - Rebased to current kernels. - Addressed review comments from v2, mostly around tweaks in the [1] https://git.sphere.ly/dtc/kernel_moto_falcon/commit/acc207616a91a413a50fdd8847a747c4a7324167 Julien Grall (2): arm64/sve: Don't disable SVE on syscalls return arm64/sve: Rework SVE trap access to use TIF_SVE_NEEDS_FLUSH arch/arm64/include/asm/fpsimd.h | 2 + arch/arm64/include/asm/thread_info.h | 6 +- arch/arm64/kernel/entry-fpsimd.S | 5 + arch/arm64/kernel/fpsimd.c | 155 ++++++++++++++++++++------- arch/arm64/kernel/process.c | 1 + arch/arm64/kernel/ptrace.c | 11 ++ arch/arm64/kernel/signal.c | 16 ++- arch/arm64/kernel/syscall.c | 13 +-- 8 files changed, 159 insertions(+), 50 deletions(-) base-commit: 3cea11cd5e3b00d91caf0b4730194039b45c5891 -- 2.20.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel