From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C4160C2D0A3 for ; Fri, 6 Nov 2020 20:47:31 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 514D520853 for ; Fri, 6 Nov 2020 20:47:31 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="DDHlN6hL"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="lp7Ot25z" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 514D520853 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=3X6Zocbhm7u726XPG0rZ2MGVxxfpHxSuq9vssbj1K68=; b=DDHlN6hLk5d3XQMaD/QfLrI6O e6vyayK9SnoYr8xOrzOQdkNzcf7kx8mExN4MLB958WLA04wHicNKjItfiZz4Lk4Qm7+SIRO+oto5U UO1RvinQSdiVp9EsnkKID6YgaPVFMuSSkfsaQGsutpiPMWRumf6BP/APK4Ny9QGcsEQZ9OyFczScb kXSopRmtiYj/DKJEdHI6hoVvxGiszLrm5eDWUwH/XFyCzdmd3fKoFvrnLn8FC0hwjyX/pXh6V+vgL WvXn2YHrzu1YFYBxlp72qNaHV8CgPrj+QRtyTHY6MfE48TAE+ilP5Q4My905TlLbYd+LujkBgvkFu tWlYmb4aQ==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kb8dO-0007xX-3j; Fri, 06 Nov 2020 20:46:58 +0000 Received: from mail-pg1-x541.google.com ([2607:f8b0:4864:20::541]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kb8dL-0007wo-J6 for linux-arm-kernel@lists.infradead.org; Fri, 06 Nov 2020 20:46:56 +0000 Received: by mail-pg1-x541.google.com with SMTP id x13so1866972pgp.7 for ; Fri, 06 Nov 2020 12:46:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=eNgghEz1mYX/bJ2cjckJAUQAeVwCGxBsecpojcnHypQ=; b=lp7Ot25zfCZihYpuko12ICgok6mxZgoD3AQocsaCgoqxNsU70LkJ4UpP0t36CNhxJe j9nQv8D3BDpXX46lnkJU7RySc5Ciui+uWs+myTXddSHI9WcqU3O0patZ97G0UblfB4Yi 3QNmm+k3Ddh8ZCeuuWK9j8urpXLV4VKIOmuOOw6uvMfJS/+WjdkYtaNS6VbVDf2WKtsO 4JD+Q+AKuni3ifYEsKBOPfr5ky5y/oGcM3Xe3ruuqWPDZnsPDFIQn+cMUP8/lT21LniZ acymgyhzZsvzRdBct0nKzjo7h4uwvrWXSLzjUwlT2Egk3XBcYWTuM+82R1hOjYmAGIvi ToBA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=eNgghEz1mYX/bJ2cjckJAUQAeVwCGxBsecpojcnHypQ=; b=WuqQXJaiaGyv4pgROB6EMCMR7/FVL3uRE/2kZll1NiOOSn2jo0i/pWJLlzm56lMxzc XKGPplw2CeyD36EwcCADs0nmDM5wJVDjqcMbjzfRvv0I6BdHUF5rObxjc0GIb7qwuoAo zeo6X9re3JVclSvWa1FE+O4NZRxdqmpXYZRkSfsQ1lSY+mCWdFEksmKq9S1ql3BR0J7o sW8ZGQ36BH9F+JWqZRo67a2FMGitT7L+pyZo/HpYziqGGmfnCa6XyeCZdSzjE5RmrcRn hwLDZA3KWCbUbmBjJWxSwdalHHXXpPQGPQmwIYwSiX6sIfO688Ip3Juky9JLqrQK/tfg r/uA== X-Gm-Message-State: AOAM530wYJAhb5WGH2QvzRCZ2pWYsdkorj2xPzSYd2T2rP1LQan6201U bdkYIfUKFAUE4ndLhShhr+umtQ== X-Google-Smtp-Source: ABdhPJyoHvKfq8eXPNIkT+TVBZ58/fgyw5PlRwnnHpml05JwvKlWx2npYd5UcHBdZvw+KYhQICjB4Q== X-Received: by 2002:a17:90b:783:: with SMTP id l3mr1497715pjz.122.1604695611372; Fri, 06 Nov 2020 12:46:51 -0800 (PST) Received: from xps15 (S0106002369de4dac.cg.shawcable.net. [68.147.8.254]) by smtp.gmail.com with ESMTPSA id z5sm3822055pjr.22.2020.11.06.12.46.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Nov 2020 12:46:50 -0800 (PST) Date: Fri, 6 Nov 2020 13:46:49 -0700 From: Mathieu Poirier To: Suzuki K Poulose Subject: Re: [PATCH v3 19/26] coresight: etm4x: Detect access early on the target CPU Message-ID: <20201106204649.GC3299843@xps15> References: <20201028220945.3826358-1-suzuki.poulose@arm.com> <20201028220945.3826358-21-suzuki.poulose@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20201028220945.3826358-21-suzuki.poulose@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201106_154655_673684_521A5D64 X-CRM114-Status: GOOD ( 26.54 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: coresight@lists.linaro.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, mike.leach@linaro.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Oct 28, 2020 at 10:09:38PM +0000, Suzuki K Poulose wrote: > In preparation to detect the support for system instruction > support, move the detection of the device access to the target > CPU. > > Signed-off-by: Suzuki K Poulose > --- > .../coresight/coresight-etm4x-core.c | 45 ++++++++++++++++--- > 1 file changed, 40 insertions(+), 5 deletions(-) > > diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c > index f038bb10bc78..308674ab746c 100644 > --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c > +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c > @@ -56,6 +56,11 @@ static u64 etm4_get_access_type(struct etmv4_config *config); > > static enum cpuhp_state hp_online; > > +struct etm_init_arg { > + struct etmv4_drvdata *drvdata; > + struct csdev_access *csa; > +}; > + > u64 etm4x_sysreg_read(struct csdev_access *csa, > u32 offset, > bool _relaxed, > @@ -669,6 +674,22 @@ static const struct coresight_ops etm4_cs_ops = { > .source_ops = &etm4_source_ops, > }; > > +static bool etm_init_iomem_access(struct etmv4_drvdata *drvdata, > + struct csdev_access *csa) > +{ > + *csa = CSDEV_ACCESS_IOMEM(drvdata->base); > + return true; > +} > + > +static bool etm_init_csdev_access(struct etmv4_drvdata *drvdata, > + struct csdev_access *csa) > +{ > + if (drvdata->base) > + return etm_init_iomem_access(drvdata, csa); > + > + return false; > +} I would also prefix the above two functions with "etm4_" rather than "etm_" to follow what is already done in this file. > + > static void etm4_init_arch_data(void *info) > { > u32 etmidr0; > @@ -677,11 +698,22 @@ static void etm4_init_arch_data(void *info) > u32 etmidr3; > u32 etmidr4; > u32 etmidr5; > - struct etmv4_drvdata *drvdata = info; > - struct csdev_access tmp_csa = CSDEV_ACCESS_IOMEM(drvdata->base); > - struct csdev_access *csa = &tmp_csa; > + struct etm_init_arg *init_arg = info; > + struct etmv4_drvdata *drvdata; > + struct csdev_access *csa; > int i; > > + drvdata = init_arg->drvdata; > + csa = init_arg->csa; > + > + /* > + * If we are unable to detect the access mechanism, > + * or unable to detect the trace unit type, fail > + * early. > + */ > + if (!etm_init_csdev_access(drvdata, csa)) > + return; > + > /* Make sure all registers are accessible */ > etm4_os_unlock_csa(drvdata, csa); > etm4_cs_unlock(drvdata, csa); > @@ -1524,6 +1556,7 @@ static int etm4_probe(struct amba_device *adev, const struct amba_id *id) > struct etmv4_drvdata *drvdata; > struct resource *res = &adev->res; > struct coresight_desc desc = { 0 }; > + struct etm_init_arg init_arg = { 0 }; > > drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); > if (!drvdata) > @@ -1551,7 +1584,6 @@ static int etm4_probe(struct amba_device *adev, const struct amba_id *id) > return PTR_ERR(base); > > drvdata->base = base; > - desc.access = CSDEV_ACCESS_IOMEM(base); > > spin_lock_init(&drvdata->spinlock); > > @@ -1563,8 +1595,11 @@ static int etm4_probe(struct amba_device *adev, const struct amba_id *id) > if (!desc.name) > return -ENOMEM; > > + init_arg.drvdata = drvdata; > + init_arg.csa = &desc.access; > + > if (smp_call_function_single(drvdata->cpu, > - etm4_init_arch_data, drvdata, 1)) > + etm4_init_arch_data, &init_arg, 1)) > dev_err(dev, "ETM arch init failed\n"); > > if (etm4_arch_supported(drvdata->arch) == false) > -- > 2.24.1 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel