From: Kishon Vijay Abraham I <kishon@ti.com>
To: Tero Kristo <t-kristo@ti.com>, Nishanth Menon <nm@ti.com>,
Rob Herring <robh+dt@kernel.org>, Roger Quadros <rogerq@ti.com>,
Lee Jones <lee.jones@linaro.org>
Cc: devicetree@vger.kernel.org, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org,
Kishon Vijay Abraham I <kishon@ti.com>,
Bjorn Helgaas <bhelgaas@google.com>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 1/7] dt-bindings: mfd: ti, j721e-system-controller.yaml: Document "syscon"
Date: Mon, 9 Nov 2020 22:34:03 +0530 [thread overview]
Message-ID: <20201109170409.4498-2-kishon@ti.com> (raw)
In-Reply-To: <20201109170409.4498-1-kishon@ti.com>
Add binding documentation for "syscon" which should be a subnode of
the system controller (scm-conf).
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
.../mfd/ti,j721e-system-controller.yaml | 40 +++++++++++++++++++
1 file changed, 40 insertions(+)
diff --git a/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml b/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml
index 19fcf59fd2fe..0b115b707ab2 100644
--- a/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml
+++ b/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml
@@ -50,6 +50,38 @@ patternProperties:
specified in
Documentation/devicetree/bindings/mux/reg-mux.txt
+ "^syscon@[0-9a-f]+$":
+ type: object
+ description: |
+ This is the system controller configuration required to configure PCIe
+ mode, lane width and speed.
+
+ properties:
+ compatible:
+ items:
+ - enum:
+ - ti,j721e-system-controller
+ - const: syscon
+ - const: simple-mfd
+
+ reg:
+ maxItems: 1
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 1
+
+ ranges: true
+
+ required:
+ - compatible
+ - reg
+ - "#address-cells"
+ - "#size-cells"
+ - ranges
+
required:
- compatible
- reg
@@ -72,5 +104,13 @@ examples:
compatible = "mmio-mux";
reg = <0x00004080 0x50>;
};
+
+ pcie1_ctrl: syscon@4074 {
+ compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
+ reg = <0x00004074 0x4>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x4074 0x4074 0x4>;
+ };
};
...
--
2.17.1
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next prev parent reply other threads:[~2020-11-09 17:05 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-09 17:04 [PATCH v2 0/7] J7200: Add PCIe DT nodes to Enable PCIe Kishon Vijay Abraham I
2020-11-09 17:04 ` Kishon Vijay Abraham I [this message]
2020-11-11 21:28 ` [PATCH v2 1/7] dt-bindings: mfd: ti,j721e-system-controller.yaml: Document "syscon" Rob Herring
2020-11-12 5:25 ` [PATCH v2 1/7] dt-bindings: mfd: ti, j721e-system-controller.yaml: " Kishon Vijay Abraham I
2020-11-12 16:46 ` Rob Herring
2020-11-09 17:04 ` [PATCH v2 2/7] dt-bindings: PCI: Add host mode dt-bindings for TI's J7200 SoC Kishon Vijay Abraham I
2020-11-09 17:04 ` [PATCH v2 3/7] dt-bindings: PCI: Add EP " Kishon Vijay Abraham I
2020-11-09 17:04 ` [PATCH v2 4/7] arm64: dts: ti: k3-j7200-main: Add DT for WIZ and SERDES Kishon Vijay Abraham I
2020-11-09 17:04 ` [PATCH v2 5/7] arm64: dts: ti: k3-j7200-main: Add PCIe device tree node Kishon Vijay Abraham I
2020-11-12 16:05 ` Vignesh Raghavendra
2020-11-09 17:04 ` [PATCH v2 6/7] arm64: dts: ti: k3-j7200-common-proc-board: Enable SERDES0 Kishon Vijay Abraham I
2020-11-12 15:58 ` Vignesh Raghavendra
2020-11-09 17:04 ` [PATCH v2 7/7] arm64: dts: ti: k3-j7200-common-proc-board: Enable PCIe Kishon Vijay Abraham I
2020-11-12 15:56 ` Vignesh Raghavendra
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