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Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kd9B4-0006JV-P4; Thu, 12 Nov 2020 09:46:02 +0000 Received: from mail.kernel.org ([198.145.29.99]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kd9B1-0006IG-HI for linux-arm-kernel@lists.infradead.org; Thu, 12 Nov 2020 09:46:00 +0000 Received: from gaia (unknown [2.26.170.190]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 000EF21D40; Thu, 12 Nov 2020 09:45:55 +0000 (UTC) Date: Thu, 12 Nov 2020 09:45:53 +0000 From: Catalin Marinas To: Vincenzo Frascino Subject: Re: [PATCH v9 32/44] arm64: mte: Switch GCR_EL1 in kernel entry and exit Message-ID: <20201112094553.GG29613@gaia> References: <25401c15dc19c7b672771f5b49a208d6e77bfeb5.1605046192.git.andreyknvl@google.com> <20201112093908.GE29613@gaia> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201112_044559_687407_6A748631 X-CRM114-Status: GOOD ( 22.03 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-kernel@lists.infradead.org, Marco Elver , Andrey Konovalov , Kevin Brodsky , Will Deacon , Branislav Rankov , kasan-dev@googlegroups.com, linux-kernel@vger.kernel.org, linux-mm@kvack.org, Alexander Potapenko , Evgenii Stepanov , Andrey Ryabinin , Andrew Morton , Dmitry Vyukov Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Nov 12, 2020 at 09:45:45AM +0000, Vincenzo Frascino wrote: > On 11/12/20 9:39 AM, Catalin Marinas wrote: > > On Tue, Nov 10, 2020 at 11:10:29PM +0100, Andrey Konovalov wrote: > >> diff --git a/arch/arm64/kernel/mte.c b/arch/arm64/kernel/mte.c > >> index 664c968dc43c..dbda6598c19d 100644 > >> --- a/arch/arm64/kernel/mte.c > >> +++ b/arch/arm64/kernel/mte.c > >> @@ -129,6 +131,26 @@ void *mte_set_mem_tag_range(void *addr, size_t size, u8 tag) > >> return ptr; > >> } > >> > >> +void mte_init_tags(u64 max_tag) > >> +{ > >> + static bool gcr_kernel_excl_initialized = false; > >> + > >> + if (!gcr_kernel_excl_initialized) { > >> + /* > >> + * The format of the tags in KASAN is 0xFF and in MTE is 0xF. > >> + * This conversion extracts an MTE tag from a KASAN tag. > >> + */ > >> + u64 incl = GENMASK(FIELD_GET(MTE_TAG_MASK >> MTE_TAG_SHIFT, > >> + max_tag), 0); > >> + > >> + gcr_kernel_excl = ~incl & SYS_GCR_EL1_EXCL_MASK; > >> + gcr_kernel_excl_initialized = true; > >> + } > >> + > >> + /* Enable the kernel exclude mask for random tags generation. */ > >> + write_sysreg_s(SYS_GCR_EL1_RRND | gcr_kernel_excl, SYS_GCR_EL1); > >> +} > > > > I don't think this function belongs to this patch. There is an earlier > > patch that talks about mte_init_tags() but no trace of it until this > > patch. > > Could you please point out to which patch are you referring to? I replied to it already (or you can search ;)). But this patch is about switching GCR_EL1 on exception entry/exit rather than setting up the initial kernel GCR_EL1 value. -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel