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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Nov 11, 2020 at 04:27:00PM +0000, Qais Yousef wrote: > On 11/09/20 13:52, Will Deacon wrote: > > On Fri, Nov 06, 2020 at 02:48:35PM +0000, Qais Yousef wrote: > > > On 11/06/20 13:00, Will Deacon wrote: > > > > On Fri, Nov 06, 2020 at 12:54:25PM +0000, Qais Yousef wrote: > > > > > FWIW I have my v3 over here in case it's of any help. It solves the problem of > > > > > HWCAP discovery when late AArch32 CPU is booted by populating boot_cpu_date > > > > > with 32bit features then. > > > > > > > > > > git clone https://git.gitlab.arm.com/linux-arm/linux-qy.git -b asym-aarch32-upstream-v3 origin/asym-aarch32-upstream-v3 > > > > > > > > Cheers, I've done something similar. I was hoping to post it today, but I've > > > > been side-tracked with bug fixing this morning. The main headache I ended up > > > > with was allowing late-onlining of 64-bit-only CPUs if all the boot CPUs > > > > are 32-bit capable. What do you do in that case? > > > > > > Do you mean if CPUs 0-3 were 32bit capable and we boot with maxcpus=4 then > > > attempt to bring the remaining 64bit-only cpus online later? > > > > Right. I think we will refuse to online them. I'll post my attempt at > > handling that shortly. > > Sorry for the delayed response. > > You're right, I tried that and they refuse to come online. We missed that tbh. > > Haven't thought what we should do yet. I tried your v2 and it failed similarly. Hmm, it shouldn't do. Please could you provide the log? My hunch is that you are blatting 32-bit EL1 support as well, and we can't handle a mismatch for that with a late CPU. Do you know if the CPUs being integrated into these broken designs have a mismatch at EL1 as well? > I usually have a similar hunk in my testing to check how the kernel perceives > the 32bit support when I execute a binary: > > diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h > index f447d313a9c5..a9549e55a6c8 100644 > --- a/arch/arm64/include/asm/cpufeature.h > +++ b/arch/arm64/include/asm/cpufeature.h > @@ -611,6 +611,9 @@ static inline bool system_supports_32bit_el0(void) > { > u64 pfr0 = read_sanitised_ftr_reg(SYS_ID_AA64PFR0_EL1); > > + pr_err("System supports symmetric 32bit el0: %d\n", id_aa64pfr0_32bit_el0(pfr0)); > + pr_err("System supports Asymmetric 32bit el0: %ld\n", static_branch_unlikely(&arm64_mismatched_32bit_el0)); > + > return id_aa64pfr0_32bit_el0(pfr0) || > static_branch_unlikely(&arm64_mismatched_32bit_el0); > } > > In your v2 both conditions are true. In my series we see the system as > symmetric if we boot the 32bit capable cpus _only_. The "arm64_mismatched_32bit_el0" key drives both the creation of the sysfs file and the allocation of the cpu mask. See the comment in cpufeature.c That file should be created whenever the command-line is passed to enable this feature, because a late CPU could come up and set bits in there. The presence of the file can therefore inform userspace that this can happen. Will _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel