From: Jean-Philippe Brucker <jean-philippe@linaro.org>
To: joro@8bytes.org, will@kernel.org, lorenzo.pieralisi@arm.com,
robh+dt@kernel.org
Cc: devicetree@vger.kernel.org,
Kuppuswamy Sathyanarayanan
<sathyanarayanan.kuppuswamy@linux.intel.com>,
linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org,
guohanjun@huawei.com, rjw@rjwysocki.net,
shameerali.kolothum.thodi@huawei.com, eric.auger@redhat.com,
iommu@lists.linux-foundation.org, Jonathan.Cameron@huawei.com,
sudeep.holla@arm.com, bhelgaas@google.com,
zhangfei.gao@linaro.org, vivek.gautam@arm.com,
baolu.lu@linux.intel.com, robin.murphy@arm.com,
Jean-Philippe Brucker <jean-philippe@linaro.org>,
linux-arm-kernel@lists.infradead.org, lenb@kernel.org
Subject: [PATCH v8 8/9] PCI/ATS: Export PRI functions
Date: Thu, 12 Nov 2020 13:55:20 +0100 [thread overview]
Message-ID: <20201112125519.3987595-9-jean-philippe@linaro.org> (raw)
In-Reply-To: <20201112125519.3987595-1-jean-philippe@linaro.org>
The SMMUv3 driver uses pci_{enable,disable}_pri() and related
functions. Export those functions to allow the driver to be built as a
module.
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
---
drivers/pci/ats.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/pci/ats.c b/drivers/pci/ats.c
index 46bc7f31fb4d..e36d601015d9 100644
--- a/drivers/pci/ats.c
+++ b/drivers/pci/ats.c
@@ -191,6 +191,7 @@ void pci_pri_init(struct pci_dev *pdev)
if (status & PCI_PRI_STATUS_PASID)
pdev->pasid_required = 1;
}
+EXPORT_SYMBOL_GPL(pci_pri_init);
/**
* pci_enable_pri - Enable PRI capability
@@ -238,6 +239,7 @@ int pci_enable_pri(struct pci_dev *pdev, u32 reqs)
return 0;
}
+EXPORT_SYMBOL_GPL(pci_enable_pri);
/**
* pci_disable_pri - Disable PRI capability
@@ -317,6 +319,7 @@ int pci_reset_pri(struct pci_dev *pdev)
return 0;
}
+EXPORT_SYMBOL_GPL(pci_reset_pri);
/**
* pci_prg_resp_pasid_required - Return PRG Response PASID Required bit
@@ -332,6 +335,7 @@ int pci_prg_resp_pasid_required(struct pci_dev *pdev)
return pdev->pasid_required;
}
+EXPORT_SYMBOL_GPL(pci_prg_resp_pasid_required);
/**
* pci_pri_supported - Check if PRI is supported.
--
2.29.1
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next prev parent reply other threads:[~2020-11-12 13:04 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-12 12:55 [PATCH v8 0/9] iommu: I/O page faults for SMMUv3 Jean-Philippe Brucker
2020-11-12 12:55 ` [PATCH v8 1/9] iommu: Add a page fault handler Jean-Philippe Brucker
2020-11-12 12:55 ` [PATCH v8 2/9] iommu/arm-smmu-v3: Maintain a SID->device structure Jean-Philippe Brucker
2020-11-12 12:55 ` [PATCH v8 3/9] dt-bindings: document stall property for IOMMU masters Jean-Philippe Brucker
2020-11-12 12:55 ` [PATCH v8 4/9] of/iommu: Support dma-can-stall property Jean-Philippe Brucker
2020-11-26 18:09 ` Robin Murphy
2020-12-14 12:51 ` Jean-Philippe Brucker
2020-12-18 6:47 ` Zhangfei Gao
2020-11-12 12:55 ` [PATCH v8 5/9] ACPI/IORT: Enable stall support for platform devices Jean-Philippe Brucker
2020-11-13 0:41 ` Hanjun Guo
2020-11-12 12:55 ` [PATCH v8 6/9] iommu/arm-smmu-v3: Add " Jean-Philippe Brucker
2020-11-12 12:55 ` [PATCH v8 7/9] PCI/ATS: Add PRI stubs Jean-Philippe Brucker
2020-11-12 12:55 ` Jean-Philippe Brucker [this message]
2020-11-12 12:55 ` [PATCH v8 9/9] iommu/arm-smmu-v3: Add support for PRI Jean-Philippe Brucker
2020-12-03 6:52 ` [PATCH v8 0/9] iommu: I/O page faults for SMMUv3 Vivek Gautam
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