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Thu, 19 Nov 2020 07:28:30 -0600 Received: from DFLE110.ent.ti.com (10.64.6.31) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Thu, 19 Nov 2020 07:28:30 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE110.ent.ti.com (10.64.6.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Thu, 19 Nov 2020 07:28:29 -0600 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 0AJDSTHE078591; Thu, 19 Nov 2020 07:28:29 -0600 Date: Thu, 19 Nov 2020 07:28:29 -0600 From: Nishanth Menon To: Grygorii Strashko Subject: Re: [PATCH v2 2/4] arm64: dts: ti: k3: squelch warnings regarding no #address-cells for interrupt-controller Message-ID: <20201119132829.sr435jf6s4275q4i@boxlike> References: <20201117161942.38754-1-nsekhar@ti.com> <20201117161942.38754-3-nsekhar@ti.com> <20201118151259.kpag44djji4ssiup@eldest> <18e41dba-a3dd-308a-605e-63b76ca638e5@ti.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <18e41dba-a3dd-308a-605e-63b76ca638e5@ti.com> User-Agent: NeoMutt/20171215 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201119_082835_464605_8D2B56DD X-CRM114-Status: GOOD ( 30.34 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Device Tree Mailing List , Lokesh Vutla , Andre Przywara , Sekhar Nori , linux-kernel@vger.kernel.org, Faiz Abbas , Tero Kristo , Rob Herring , Linux ARM Mailing List Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Punting over to Rob and DT team's wisdom.. On 13:17-20201119, Grygorii Strashko wrote: > > > On 18/11/2020 17:12, Nishanth Menon wrote: > > On 13:38-20201118, Grygorii Strashko wrote: > > > Hi Rob, > > > > > > On 17/11/2020 18:19, Sekhar Nori wrote: > > > > With dtc 1.6.0, building TI device-tree files with W=2 results in warnings > > > > like below for all interrupt controllers. > > > > > > > > /bus@100000/bus@30000000/interrupt-controller1: Missing #address-cells in interrupt provider > > > > > > > > Fix these by adding #address-cells = <0>; for all interrupt controllers in > > > > TI device-tree files. Any other #address-cells value is really only needed > > > > if interrupt-map property is being used (which is not the case for existing > > > > TI device-tree files) > > > > > > > > Signed-off-by: Sekhar Nori > > > > --- > > > > arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 5 +++++ > > > > arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi | 2 ++ > > > > arch/arm64/boot/dts/ti/k3-am654-base-board.dts | 1 + > > > > arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 3 +++ > > > > arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 1 + > > > > arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts | 1 + > > > > arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 11 +++++++++++ > > > > arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 3 +++ > > > > 8 files changed, 27 insertions(+) > > > > > > > > diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi > > > > index aa8725db0187..55aaa1404d7d 100644 > > > > --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi > > > > +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi > > > > @@ -440,6 +440,7 @@ > > > > interrupt-controller; > > > > interrupt-parent = <&gic500>; > > > > #interrupt-cells = <1>; > > > > + #address-cells = <0>; > > > Does it really required or mandatory to have #address-cells = <0>; defined for interrupt-controller DT nodes which > > > do not have child nodes and no "interrupt-map"? > > > > Just to help clarify (I could be mistaken as well): is'nt the > > interrupt map for user interrupt map nodes that refer to this > > interrupt controller node to state they dont need a parent address > > specifier - so are we claiming none of the users will have an > > interrupt-map (now and never in the future as well) - we we might want > > to explain why we think that is the case, and if we are expecting dtc > > to deduce that (if so how?)? > > > > The main reason I commented - is hope to get some clarification from DT maintainers. > 90% of interrupt-controller nodes do not have #address-cells and I never seen in in GPIO nodes > (most often is present in PCI and GIC nodes). > and nobody seems fixing it. So, if we are going to move this direction it's reasonable to get clarification to be sure. > > And there is no "never" here - #address-cells always can be added if really required. OK - as a GPIO node, but as an interrupt-controller node, I was looking at [1] and wondering if that was the precedence. Yes, will be good to get direction from the DT maintainers on this topic. [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/open-pic.txt -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel