From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CDF63C63697 for ; Thu, 19 Nov 2020 17:18:41 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 558EE24695 for ; Thu, 19 Nov 2020 17:18:41 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="yFbpwPiT" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 558EE24695 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=q5RPLIonBRxjvV8HsEsopSsuCm6ngEPGAira5MThT5o=; b=yFbpwPiTlKSRhK+wroCPStyck MX+UUbnKD65fSlf9n9FwYG96kFUQAf0Pc+y9dhjtHqaTmfHdPqVax/7dzy8Id+IG6qOiOFXTbsrtx UxEW+qJjadEBrkG8GfnetQESg8aMOrZc1abTcyobxUvTTpdkIVRmf3uuavv+MsniJKdfxfdvG0Y6W D8Yx4DvgrZgYeol2RYmE81UBlk/fSl4XmGMxAD6f7P+I90k03Xme3un4Ii6BZgaONVe6SorkwPxsR Ew/DG+mlxkmTTiub5T3dcL8t9d9j4IYpJIv/YqHTBBMQRKre3za08BmvrHW8htgwJ/qZDowEBqqhI XiQxIpSpA==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kfnZS-0002iR-CR; Thu, 19 Nov 2020 17:18:10 +0000 Received: from mail.kernel.org ([198.145.29.99]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kfnZO-0002i0-Ux for linux-arm-kernel@lists.infradead.org; Thu, 19 Nov 2020 17:18:07 +0000 Received: from gaia (unknown [2.26.170.190]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 3A7782468B; Thu, 19 Nov 2020 17:18:04 +0000 (UTC) Date: Thu, 19 Nov 2020 17:18:01 +0000 From: Catalin Marinas To: Suzuki K Poulose Subject: Re: [PATCH v4 24/25] arm64: Add TRFCR_ELx definitions Message-ID: <20201119171801.GE4376@gaia> References: <20201119164547.2982871-1-suzuki.poulose@arm.com> <20201119164547.2982871-25-suzuki.poulose@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20201119164547.2982871-25-suzuki.poulose@arm.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201119_121807_084664_0133E746 X-CRM114-Status: GOOD ( 10.58 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mathieu.poirier@linaro.org, anshuman.khandual@arm.com, coresight@lists.linaro.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Will Deacon , jonathan.zhouwen@huawei.com, mike.leach@linaro.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Nov 19, 2020 at 04:45:46PM +0000, Suzuki K Poulose wrote: > @@ -988,6 +991,14 @@ > /* Safe value for MPIDR_EL1: Bit31:RES1, Bit30:U:0, Bit24:MT:0 */ > #define SYS_MPIDR_SAFE_VAL (BIT(31)) > > +#define TRFCR_ELx_TS_SHIFT 5 > +#define TRFCR_ELx_TS_VIRTUAL ((0x1) << TRFCR_ELx_TS_SHIFT) > +#define TRFCR_ELx_TS_GUEST_PHYSICAL ((0x2) << TRFCR_ELx_TS_SHIFT) > +#define TRFCR_ELx_TS_PHYSICAL ((0x3) << TRFCR_ELx_TS_SHIFT) For consistency, I'd use 0x1UL etc. in case the shift goes beyond 32 (not the case here though). Otherwise: Acked-by: Catalin Marinas _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel