From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.3 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0C7D0C5519F for ; Fri, 20 Nov 2020 10:21:18 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7E5BC222BA for ; Fri, 20 Nov 2020 10:21:17 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="Bl0tOlRm" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7E5BC222BA Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=NXiIJlKoLf83P0QyhOCHZrPir0A4oei2TtBYBqQ5xGg=; b=Bl0tOlRm6LDEHLzyz5BX1pQ5X PQK4sULtbsZEBazK7w7/ki7RKL9+KY9e+jl+tABxustewwUZNbY3Gp7vSwz1iV4D4hLUO4io5tGSB 1e9PEw9LKXAc5XYKQjMk0hXoTLzzbWfbmx2pF/nh3BnhuwrGoQc68lEvcJPQA64K9Y5hCCFAOFz5D oWlqDyFBVB59H+NKLIYRPycfuTebJd6hPF8FKzCQkX3jyMUUb4FvwTuvmrFxLHLvmzNVufMhW9QrB WOga1sf4srJvjMzRq7h6Linb1Y46JEwxNPFAK0TwstrxRsMeAmrMP3uEIV2WcEg5bIiNL7UAJEnlu 4yhF+qqoQ==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kg3X7-0008Dg-Im; Fri, 20 Nov 2020 10:20:49 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kg3X5-0008DJ-R1 for linux-arm-kernel@lists.infradead.org; Fri, 20 Nov 2020 10:20:48 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9D6EC1042; Fri, 20 Nov 2020 02:20:46 -0800 (PST) Received: from bogus (unknown [10.57.54.72]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 8D13D3F70D; Fri, 20 Nov 2020 02:20:44 -0800 (PST) Date: Fri, 20 Nov 2020 10:20:42 +0000 From: Sudeep Holla To: Marc Zyngier Subject: Re: AMU extension v1 support for cortex A76, A77, A78 CPUs Message-ID: <20201120102042.25caeib3iiuxkogt@bogus> References: <2cc9dd44-0b4b-94a8-155a-7a2446a1b892@codeaurora.org> <1712842eb0767e51155a5396d282102c@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1712842eb0767e51155a5396d282102c@kernel.org> User-Agent: NeoMutt/20171215 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201120_052047_961277_C3B5886C X-CRM114-Status: GOOD ( 15.34 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, Will Deacon , suzuki.poulose@arm.com, MSM , lkml , valentin.schneider@arm.com, catalin.marinas@arm.com, ionela.voinescu@arm.com, Neeraj Upadhyay , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Nov 20, 2020 at 08:56:31AM +0000, Marc Zyngier wrote: > On 2020-11-20 04:30, Neeraj Upadhyay wrote: > > Hi, > > > > For ARM cortex A76, A77, A78 cores (which as per TRM, support AMU) > > AA64PFR0[47:44] field is not set, and AMU does not get enabled for > > them. > > Can you please provide support for these CPUs in cpufeature.c? > > If that was the case, that'd be an erratum, and it would need to be > documented as such. It could also be that this is an optional feature > for these cores (though the TRM doesn't suggest that). > > Can someone at ARM confirm what is the expected behaviour of these CPUs? IIRC discussion with Ionela long back, we intentionally decided not to support IMPDEF(pre 8.4 non-architected so called AMUs) on the CPUs listed in $subject. -- Regards, Sudeep _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel