From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E4108C2D0E4 for ; Tue, 24 Nov 2020 02:36:44 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 43C8A20719 for ; Tue, 24 Nov 2020 02:36:44 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="NmOXFbmY"; dkim=fail reason="signature verification failed" (1024-bit key) header.d=kernel.org header.i=@kernel.org header.b="LhMqBTkC" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 43C8A20719 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:Mime-Version:References:In-Reply-To:Message-Id: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=/M6kycP8i/NkCsOpygIChrnAEoh+rIWEbgBGQCTzuKM=; b=NmOXFbmYpvVPZUZFeL1Y2BjeS FgFJLRyTufjfB6b0l3twFI+tPKjo/5hiNsZVJrwjM11EMJHts5J1PM4cCrDAOTo4eyFmA3BnwaBHh b5Rw4xvNfdx/NfojasHxvHfo8sf+x2j8g4x3RC2R5ygAakPuRoiF9s8fjYjQ7fyTmjpbf25ZRA/1W IAmnnnr+etTiLlJBpCNoKLIbNASQvxtKCqx+Aj3Fhl60STE9Q2sEQb9XWUOLeQ8jXiJ4Bc+2hVq8Y /WeZc/7gEMe42/fJ12gtJsLUEbGIUyxbvy82UtD6J1q2y9b3P0dY3Qimz0UvROgVBLRHZMeLa+vti fCmoYbtCg==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1khOAd-0005HW-LA; Tue, 24 Nov 2020 02:35:07 +0000 Received: from mail.kernel.org ([198.145.29.99]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1khOAa-0005H4-LE for linux-arm-kernel@lists.infradead.org; Tue, 24 Nov 2020 02:35:05 +0000 Received: from devnote2 (NE2965lan1.rev.em-net.ne.jp [210.141.244.193]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id CE8C420719; Tue, 24 Nov 2020 02:35:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1606185302; bh=yggXNIIRKbG3hu4hm5iKypT0/yONvJEXz9mDOsCmKXE=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=LhMqBTkCB+N1qRSM2v1jTsuBVgybgwNxL7sD/Pr8Hf1huSXnoLmLprBwUmv6qgqci 6i+QcO0WJ//1kdmelIc4fKuMf6i31vlMBU0DVLbtYUThNb3NYCDikVgKq/pSTtr3k/ sUb8b4+5rTR3V5zVK9RjGYuNLD88jbMstaWiIPR8= Date: Tue, 24 Nov 2020 11:34:58 +0900 From: Masami Hiramatsu To: Jean-Philippe Brucker Subject: Re: [PATCH] arm64: kprobes: Use BRK instead of single-step when executing instructions out-of-line Message-Id: <20201124113458.ae7324d36199ecdb7e9f4377@kernel.org> In-Reply-To: <20201117172812.GA551957@myrica> References: <20201029173440.117174-1-jean-philippe@linaro.org> <20201102114152.GA3452@willie-the-truck> <20201102225255.fa991f3607c45bbbb161803c@kernel.org> <20201103091305.GA6723@myrica> <20201103092315.GC4403@willie-the-truck> <20201117172812.GA551957@myrica> X-Mailer: Sylpheed 3.7.0 (GTK+ 2.24.32; x86_64-pc-linux-gnu) Mime-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201123_213504_885949_F71E57FC X-CRM114-Status: GOOD ( 25.17 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: catalin.marinas@arm.com, Will Deacon , Masami Hiramatsu , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, 17 Nov 2020 18:28:12 +0100 Jean-Philippe Brucker wrote: > On Tue, Nov 03, 2020 at 09:23:16AM +0000, Will Deacon wrote: > > Yes, let's just set all of DAIF during the trampoline. Also, while I've got > > you, If you get a chance, I'd appreciate any feedback on my proposal for > > reworking our debug exception handling altogether: > > > > https://lore.kernel.org/r/20200626095551.GA9312@willie-the-truck > > Well, I stared at this for a while... It looks fine to me, but I don't > have a full picture of the trap infrastructure (not sure whether you were > asking me). I could help with testing if you get around to reworking it. > > > On taking an interrupt from EL1, stash MDSCR_EL1.SS in a pcpu variable and > > clear the register bit if it was set. Then unmask only D and leave I set. On > > return from the exception, set D and restore MDSCR_EL1.SS. If we decide to > > reschedule, unmask D (i.e. we only step into interrupts if we need a > > reschedule. Alternatively, we could skip the reschedule if we were > > stepping.) > > Any specific reason to treat reschedule differently, or just to keep > things simple? I'm asking because that could be a problem with the > current code: when taking an interrupt while stepping EL1, we keep > MDSCR_EL1.SS set and unmask D before calling the IRQ handler. The step > exception might only be taken after the next context synchronization event > (on QEMU it happens at an isb in the timer handler). If the IRQ handler > doesn't happen to do any context synchronization and we reschedule, I > guess the step exception could happen after the next eret? Will, would you have any comment on this? I guess if SS on EL1 enabled with kprobes, this may happen (SS means SS exception happens) [orig-code(SS)]->[1st BRK](D set)->[copied insn(!SS)]->[2nd BRK](D unmask)->[orig-code(SS)] What if we unmask D flag (current code), this may happen [orig-code(SS)]->[1st BRK](D unmask)->[copied insn(SS)]->[2nd BRK](D unmask)->[orig-code(SS)] But as you pointed, this may make things complex. (maybe debugger also needs to care about this case, because the single-stepped address is far from the original code, they may not be able to find correct source line.) So keeping D flag set in this phase is good to me, until we solve the debugger-side support. Thank you, -- Masami Hiramatsu _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel