From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_2 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C3F47C63777 for ; Fri, 27 Nov 2020 09:27:25 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2D909206B2 for ; Fri, 27 Nov 2020 09:27:25 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="gQXL7OO5" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2D909206B2 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Type:Cc: List-Subscribe:List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id: MIME-Version:References:In-Reply-To:Message-ID:Subject:To:From:Date:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=2C0ASEQtwRZaFoOiXMZNkJbFehMZsZJ0/DKxibNO5tg=; b=gQXL7OO5H2fGeybpyHhfbbx0A TZzhKau2I7InxCVlSEQ5WbmPFBXOmI9vuSqQLaiN9b0HewpzeCXZ/U77NL03CdCsovtN0S2C/h+63 vRjk5QvhuR2z0tztmACI1YbpApc3hclNie3YGNUSprymY6Igp4TVmSWDnzFRwcsq4eX8jweI/g0tw YRveHGQYmqBrO2lQEg4niOdf/Qr998YY71MycHvwRXvSnvqbHdPd2fJgvuA2VKyxlKRQJMK91HQlY Bulc9UGGXAFM46QjjCFRNhsEESjiaV3136CId4jWCoSXwmUh3G3LCJZ6yuZ2VKSrXPQsDu78fo2Ai /ptHtsBwQ==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kia0l-00074J-5M; Fri, 27 Nov 2020 09:25:53 +0000 Received: from mail-out.m-online.net ([212.18.0.9]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kia0X-00071C-Pt for linux-arm-kernel@lists.infradead.org; Fri, 27 Nov 2020 09:25:42 +0000 Received: from frontend01.mail.m-online.net (unknown [192.168.8.182]) by mail-out.m-online.net (Postfix) with ESMTP id 4Cj8PD5Ps8z1qtdP; Fri, 27 Nov 2020 10:25:36 +0100 (CET) Received: from localhost (dynscan1.mnet-online.de [192.168.6.70]) by mail.m-online.net (Postfix) with ESMTP id 4Cj8PD3qWQz1sy8T; Fri, 27 Nov 2020 10:25:36 +0100 (CET) X-Virus-Scanned: amavisd-new at mnet-online.de Received: from mail.mnet-online.de ([192.168.8.182]) by localhost (dynscan1.mail.m-online.net [192.168.6.70]) (amavisd-new, port 10024) with ESMTP id wKFCwMyZBImG; Fri, 27 Nov 2020 10:25:34 +0100 (CET) X-Auth-Info: ianmljXdbQK85ES58zeJwixR/kDdN+OwoExd+bYP9O8= Received: from jawa (89-64-5-98.dynamic.chello.pl [89.64.5.98]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.mnet-online.de (Postfix) with ESMTPSA; Fri, 27 Nov 2020 10:25:34 +0100 (CET) Date: Fri, 27 Nov 2020 10:25:28 +0100 From: Lukasz Majewski To: Andrew Lunn Subject: Re: [RFC 0/4] net: l2switch: Provide support for L2 switch on i.MX28 SoC Message-ID: <20201127102528.33737ea4@jawa> In-Reply-To: <20201127010811.GR2075216@lunn.ch> References: <20201125232459.378-1-lukma@denx.de> <20201126123027.ocsykutucnhpmqbt@skbuf> <20201127003549.3753d64a@jawa> <20201127010811.GR2075216@lunn.ch> Organization: denx.de X-Mailer: Claws Mail 3.17.4 (GTK+ 2.24.32; x86_64-pc-linux-gnu) MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201127_042541_352472_BC713311 X-CRM114-Status: GOOD ( 24.07 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peng Fan , Florian Fainelli , Fugang Duan , Shawn Guo , stefan.agner@toradex.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, krzk@kernel.org, Vivien Didelot , NXP Linux Team , Jakub Kicinski , Vladimir Oltean , Fabio Estevam , "David S . Miller" , linux-arm-kernel@lists.infradead.org Content-Type: multipart/mixed; boundary="===============8849452344025615090==" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org --===============8849452344025615090== Content-Type: multipart/signed; micalg=pgp-sha512; boundary="Sig_/ZUTcj07yviLAI8FZ6erwpu5"; protocol="application/pgp-signature" --Sig_/ZUTcj07yviLAI8FZ6erwpu5 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: quoted-printable Hi Andrew, > > > I would push back and say that the switch offers bridge > > > acceleration for the FEC. =20 > >=20 > > Am I correct, that the "bridge acceleration" means in-hardware > > support for L2 packet bridging? =20 >=20 > You should think of the hardware as an accelerator, not a switch. The > hardware is there to accelerate what linux can already do. You setup a > software bridge in linux, and then offload L2 switching to the > accelerator. You setup vlans in linux, and then offload the filtering > of them to the accelerator. If there is something linux can do, but > the hardware cannot accelerate, you leave linux to do it in software. Ok. >=20 > > Do you propose to catch some kind of notification when user calls: > >=20 > > ip link add name br0 type bridge; ip link set br0 up; > > ip link set lan1 up; ip link set lan2 up; > > ip link set lan1 master br0; ip link set lan2 master br0; > > bridge link > >=20 > > And then configure the FEC driver to use this L2 switch driver? =20 >=20 > That is what switchdev does. There are various hooks in the network > stack which call into switchdev to ask it to offload operations to the > accelerator. Ok. >=20 > > The differences from "normal" DSA switches: > >=20 > > 1. It uses mapped memory (for its register space) for > > configuration/statistics gathering (instead of e.g. SPI, I2C) =20 >=20 > That does not matter. And there are memory mapped DSA switches. The > DSA framework puts no restrictions on how the control plane works. >=20 > > (Of course the "Section 32.5.8.2" is not available) =20 >=20 > It is in the Vybrid datasheet :-) Hmm... I cannot find such chapter in the official documentation from NXP: "VFxxx Controller Reference Manual, Rev. 0, 10/2016" Maybe you have more verbose version? Could you share how the document is named? >=20 > Andrew Best regards, Lukasz Majewski -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de --Sig_/ZUTcj07yviLAI8FZ6erwpu5 Content-Type: application/pgp-signature Content-Description: OpenPGP digital signature -----BEGIN PGP SIGNATURE----- iQEzBAEBCgAdFiEEgAyFJ+N6uu6+XupJAR8vZIA0zr0FAl/AxggACgkQAR8vZIA0 zr1hWwgAztQi95LdLdoifqpiMT0HJvIfQeEIBoYi1gdhVa6pKuuyoyAEEphKsLs+ PXv0a85iBITwkbv28qBmF2K70mejPSe65JUUIllRzWuBVcZotACNIlNI8poI0SIW pCUsTZkxlPSXplQVyKs9c5YkY8KdGZvHdwZ55BITloHLwkngbIWC6f89Zb9mcgHb w480ibSeaSnCJRB4ZfD0b2+9w3LTqW4nG2SUc2a8fC5hDHzt5YL8rjG33T3Ok0r+ L0PycPjKwA8ybHWduNmt5Ck4G9/AOsfXnWzXYDh7OKCWbz6TlRrQP1BxmIo3WTnU ZlKcRWcqX+19Itn8CYyHCP7mHZjxqw== =7wS1 -----END PGP SIGNATURE----- --Sig_/ZUTcj07yviLAI8FZ6erwpu5-- --===============8849452344025615090== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel --===============8849452344025615090==--