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[68.147.0.187]) by smtp.gmail.com with ESMTPSA id 64sm8363944pfe.0.2020.11.27.10.55.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Nov 2020 10:55:24 -0800 (PST) Date: Fri, 27 Nov 2020 11:55:22 -0700 From: Mathieu Poirier To: Suzuki K Poulose Subject: Re: [PATCH v4 02/25] coresight: etm4x: Skip accessing TRCPDCR in save/restore Message-ID: <20201127185522.GB1092947@xps15> References: <20201119164547.2982871-1-suzuki.poulose@arm.com> <20201119164547.2982871-3-suzuki.poulose@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20201119164547.2982871-3-suzuki.poulose@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201127_135529_805714_47B51B46 X-CRM114-Status: GOOD ( 20.26 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sai Prakash Ranjan , anshuman.khandual@arm.com, coresight@lists.linaro.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Tingwei Zhang , jonathan.zhouwen@huawei.com, mike.leach@linaro.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Nov 19, 2020 at 04:45:24PM +0000, Suzuki K Poulose wrote: > When the ETM is affected by Qualcomm errata, modifying the > TRCPDCR could cause the system hang. Even though this is > taken care of during enable/disable ETM, the ETM state > save/restore could still access the TRCPDCR. Make sure > we skip the access during the save/restore. > > Found by code inspection. > > Fixes: commit 02510a5aa78df45 ("coresight: etm4x: Add support to skip trace unit power up") https://elixir.bootlin.com/linux/v5.10-rc5/source/Documentation/process/submitting-patches.rst#L121 > Cc: Mathieu Poirier > Cc: Mike Leach > Cc: Sai Prakash Ranjan > Cc: Tingwei Zhang > Signed-off-by: Suzuki K Poulose > --- > drivers/hwtracing/coresight/coresight-etm4x-core.c | 12 +++++++----- > 1 file changed, 7 insertions(+), 5 deletions(-) > > diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c > index 59a4a166adf4..ea2e317ddb7d 100644 > --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c > +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c > @@ -1277,7 +1277,8 @@ static int etm4_cpu_save(struct etmv4_drvdata *drvdata) > > state->trcclaimset = readl(drvdata->base + TRCCLAIMCLR); > > - state->trcpdcr = readl(drvdata->base + TRCPDCR); > + if (!drvdata->skip_power_up) > + state->trcpdcr = readl(drvdata->base + TRCPDCR); > > /* wait for TRCSTATR.IDLE to go up */ > if (coresight_timeout(drvdata->base, TRCSTATR, TRCSTATR_IDLE_BIT, 1)) { > @@ -1295,9 +1296,9 @@ static int etm4_cpu_save(struct etmv4_drvdata *drvdata) > * potentially save power on systems that respect the TRCPDCR_PU > * despite requesting software to save/restore state. > */ > - writel_relaxed((state->trcpdcr & ~TRCPDCR_PU), > - drvdata->base + TRCPDCR); > - > + if (!drvdata->skip_power_up) > + writel_relaxed((state->trcpdcr & ~TRCPDCR_PU), > + drvdata->base + TRCPDCR); > out: > CS_LOCK(drvdata->base); > return ret; > @@ -1392,7 +1393,8 @@ static void etm4_cpu_restore(struct etmv4_drvdata *drvdata) > > writel_relaxed(state->trcclaimset, drvdata->base + TRCCLAIMSET); > > - writel_relaxed(state->trcpdcr, drvdata->base + TRCPDCR); > + if (!drvdata->skip_power_up) > + writel_relaxed(state->trcpdcr, drvdata->base + TRCPDCR); > > drvdata->state_needs_restore = false; > > -- > 2.24.1 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel