* [PATCH v4 0/4] media: mediatek: support mdp3 on mt8183 platform
@ 2020-11-20 2:29 Daoyuan Huang
2020-11-20 2:29 ` [PATCH v4 1/4] dt-binding: mt8183: Add Mediatek MDP3 dt-bindings Daoyuan Huang
` (2 more replies)
0 siblings, 3 replies; 7+ messages in thread
From: Daoyuan Huang @ 2020-11-20 2:29 UTC (permalink / raw)
To: Mauro Carvalho Chehab, Rob Herring, Matthias Brugger,
Hans Verkuil, Jernej Skrabec
Cc: Maoguang Meng, Geert Uytterhoeven, menghui.lin, Laurent Pinchart,
drinkcat, Krzysztof Kozlowski, Ping-Hsun Wu, linux-media,
devicetree, daoyuan huang, sj.huang, linux-mediatek, pihsun,
linux-arm-kernel, randy.wu, srv_heupstream, acourbot,
linux-kernel, tfiga, ben.lok, moudy.ho, Rob Landley
From: daoyuan huang <daoyuan.huang@mediatek.com>
Changes since v3:
- Rebase on v5.9-rc1.
- modify code for review comment from Rob Herring, cancel multiple nodes using
same register base situation.
- control IOMMU port through pm runtime get/put to DMA components' device.
- SCP(VPU) driver revision.
- stop queuing jobs(remove flush_workqueue()) after mdp_m2m_release().
- add computation of plane address with data_offset.
- fix scale ratio check issue.
- add default v4l2_format setting.
Changes since v2:
- modify code for review comment from Tomasz Figa & Alexandre Courbot
- review comment from Rob Herring will offer code revision in v4, due to
it's related to device node modification, will need to modify code
architecture
Changes since v1:
- modify code for CMDQ v3 API support
- EC ipi cmd migration
- fix compliance test fail item (m2m cmd with -f)
due to there is two problem in runing all format(-f) cmd:
1. out of memory before test complete
Due to capture buffer mmap (refcount + 1) after reqbuf but seems
no corresponding munmap called before device close.
There are total 12XX items(formats) in format test and each format
alloc 8 capture/output buffers.
2. unceasingly captureBufs() (randomly)
Seems the break statement didn't catch the count == 0 situation:
In v4l2-test-buffers.cpp, function: captureBufs()
...
count--;
if (!node->is_m2m && !count)
break;
Log is as attachment
I will paste the test result with problem part in another e-mail
Hi,
This is the first version of RFC patch for Media Data Path 3 (MDP3),
MDP3 is used for scaling and color format conversion.
support using GCE to write register in critical time limitation.
support V4L2 m2m device control.
daoyuan huang (4):
[v4,1/4] dt-binding: mt8183: Add Mediatek MDP3 dt-bindings
[v4,2/4] dts: arm64: mt8183: Add Mediatek MDP3 nodes
[v4,3/4] media: platform: Add Mediatek MDP3 driver KConfig
[v4,4/4] media: platform: mtk-mdp3: Add Mediatek MDP3 driver
.../bindings/media/mediatek,mt8183-mdp3.txt | 208 +++
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 116 ++
drivers/media/platform/Kconfig | 17 +
drivers/media/platform/Makefile | 2 +
drivers/media/platform/mtk-mdp3/Makefile | 7 +
drivers/media/platform/mtk-mdp3/isp_reg.h | 37 +
.../media/platform/mtk-mdp3/mdp-platform.h | 58 +
.../media/platform/mtk-mdp3/mdp_reg_ccorr.h | 75 +
.../media/platform/mtk-mdp3/mdp_reg_rdma.h | 206 +++
drivers/media/platform/mtk-mdp3/mdp_reg_rsz.h | 109 ++
.../media/platform/mtk-mdp3/mdp_reg_wdma.h | 125 ++
.../media/platform/mtk-mdp3/mdp_reg_wrot.h | 115 ++
.../media/platform/mtk-mdp3/mmsys_config.h | 188 +++
drivers/media/platform/mtk-mdp3/mmsys_mutex.h | 35 +
.../media/platform/mtk-mdp3/mmsys_reg_base.h | 38 +
drivers/media/platform/mtk-mdp3/mtk-img-ipi.h | 281 ++++
.../media/platform/mtk-mdp3/mtk-mdp3-cmdq.c | 504 ++++++
.../media/platform/mtk-mdp3/mtk-mdp3-cmdq.h | 54 +
.../media/platform/mtk-mdp3/mtk-mdp3-comp.c | 1420 +++++++++++++++++
.../media/platform/mtk-mdp3/mtk-mdp3-comp.h | 155 ++
.../media/platform/mtk-mdp3/mtk-mdp3-core.c | 269 ++++
.../media/platform/mtk-mdp3/mtk-mdp3-core.h | 86 +
.../media/platform/mtk-mdp3/mtk-mdp3-m2m.c | 795 +++++++++
.../media/platform/mtk-mdp3/mtk-mdp3-m2m.h | 42 +
.../media/platform/mtk-mdp3/mtk-mdp3-regs.c | 748 +++++++++
.../media/platform/mtk-mdp3/mtk-mdp3-regs.h | 373 +++++
.../media/platform/mtk-mdp3/mtk-mdp3-vpu.c | 313 ++++
.../media/platform/mtk-mdp3/mtk-mdp3-vpu.h | 79 +
28 files changed, 6455 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/mediatek,mt8183-mdp3.txt
create mode 100644 drivers/media/platform/mtk-mdp3/Makefile
create mode 100644 drivers/media/platform/mtk-mdp3/isp_reg.h
create mode 100644 drivers/media/platform/mtk-mdp3/mdp-platform.h
create mode 100644 drivers/media/platform/mtk-mdp3/mdp_reg_ccorr.h
create mode 100644 drivers/media/platform/mtk-mdp3/mdp_reg_rdma.h
create mode 100644 drivers/media/platform/mtk-mdp3/mdp_reg_rsz.h
create mode 100644 drivers/media/platform/mtk-mdp3/mdp_reg_wdma.h
create mode 100644 drivers/media/platform/mtk-mdp3/mdp_reg_wrot.h
create mode 100644 drivers/media/platform/mtk-mdp3/mmsys_config.h
create mode 100644 drivers/media/platform/mtk-mdp3/mmsys_mutex.h
create mode 100644 drivers/media/platform/mtk-mdp3/mmsys_reg_base.h
create mode 100644 drivers/media/platform/mtk-mdp3/mtk-img-ipi.h
create mode 100644 drivers/media/platform/mtk-mdp3/mtk-mdp3-cmdq.c
create mode 100644 drivers/media/platform/mtk-mdp3/mtk-mdp3-cmdq.h
create mode 100644 drivers/media/platform/mtk-mdp3/mtk-mdp3-comp.c
create mode 100644 drivers/media/platform/mtk-mdp3/mtk-mdp3-comp.h
create mode 100644 drivers/media/platform/mtk-mdp3/mtk-mdp3-core.c
create mode 100644 drivers/media/platform/mtk-mdp3/mtk-mdp3-core.h
create mode 100644 drivers/media/platform/mtk-mdp3/mtk-mdp3-m2m.c
create mode 100644 drivers/media/platform/mtk-mdp3/mtk-mdp3-m2m.h
create mode 100644 drivers/media/platform/mtk-mdp3/mtk-mdp3-regs.c
create mode 100644 drivers/media/platform/mtk-mdp3/mtk-mdp3-regs.h
create mode 100644 drivers/media/platform/mtk-mdp3/mtk-mdp3-vpu.c
create mode 100644 drivers/media/platform/mtk-mdp3/mtk-mdp3-vpu.h
--
2.18.0
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^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH v4 1/4] dt-binding: mt8183: Add Mediatek MDP3 dt-bindings 2020-11-20 2:29 [PATCH v4 0/4] media: mediatek: support mdp3 on mt8183 platform Daoyuan Huang @ 2020-11-20 2:29 ` Daoyuan Huang 2020-11-20 14:41 ` Chun-Kuang Hu 2020-12-01 1:35 ` Rob Herring 2020-11-20 2:29 ` [PATCH v4 2/4] dts: arm64: mt8183: Add Mediatek MDP3 nodes Daoyuan Huang 2020-11-20 2:29 ` [PATCH v4 3/4] media: platform: Add Mediatek MDP3 driver KConfig Daoyuan Huang 2 siblings, 2 replies; 7+ messages in thread From: Daoyuan Huang @ 2020-11-20 2:29 UTC (permalink / raw) To: Mauro Carvalho Chehab, Rob Herring, Matthias Brugger, Hans Verkuil, Jernej Skrabec Cc: Maoguang Meng, Geert Uytterhoeven, menghui.lin, Laurent Pinchart, drinkcat, Krzysztof Kozlowski, Ping-Hsun Wu, linux-media, devicetree, daoyuan huang, sj.huang, linux-mediatek, pihsun, linux-arm-kernel, randy.wu, srv_heupstream, acourbot, linux-kernel, tfiga, ben.lok, moudy.ho, Rob Landley From: daoyuan huang <daoyuan.huang@mediatek.com> This patch adds DT binding document for Media Data Path 3 (MDP3) a unit in multimedia system used for scaling and color format convert. Signed-off-by: Ping-Hsun Wu <ping-hsun.wu@mediatek.com> Signed-off-by: daoyuan huang <daoyuan.huang@mediatek.com> --- .../bindings/media/mediatek,mt8183-mdp3.txt | 208 ++++++++++++++++++ 1 file changed, 208 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/mediatek,mt8183-mdp3.txt diff --git a/Documentation/devicetree/bindings/media/mediatek,mt8183-mdp3.txt b/Documentation/devicetree/bindings/media/mediatek,mt8183-mdp3.txt new file mode 100644 index 000000000000..d4db908b8b53 --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek,mt8183-mdp3.txt @@ -0,0 +1,208 @@ +* Mediatek Media Data Path 3 + +Media Data Path 3 (MDP3) is used for scaling and color space conversion. + +Required properties (controller node): +- compatible: "mediatek,mt8183-mdp3" +- mediatek,scp: the node of system control processor (SCP), using the + remoteproc & rpmsg framework, see + Documentation/devicetree/bindings/remoteproc/mtk,scp.txt for details. +- mediatek,mmsys: the node of mux(multiplexer) controller for HW connections. +- mediatek,mm-mutex: the node of sof(start of frame) signal controller. +- mediatek,mailbox-gce: the node of global command engine (GCE), used to + read/write registers with critical time limitation, see + Documentation/devicetree/bindings/mailbox/mtk-gce.txt for details. +- mboxes: mailbox number used to communicate with GCE. +- gce-subsys: sub-system id corresponding to the register address. +- gce-event-names: in use event name list, used to correspond to event IDs. +- gce-events: in use event IDs list, all IDs are defined in + 'dt-bindings/gce/mt8183-gce.h'. + +Required properties (all function blocks, child node): +- compatible: Should be one of + "mediatek,mt8183-mdp-rdma" - read DMA + "mediatek,mt8183-mdp-rsz" - resizer + "mediatek,mt8183-mdp-wdma" - write DMA + "mediatek,mt8183-mdp-wrot" - write DMA with rotation + "mediatek,mt8183-mdp-ccorr" - color correction with 3X3 matrix +- reg: Physical base address and length of the function block register space. +- clocks: device clocks, see + Documentation/devicetree/bindings/clock/clock-bindings.txt for details. +- power-domains: A phandle to the power domain, see + Documentation/devicetree/bindings/power/power_domain.txt for details. +- mediatek,mdp-id: HW index to distinguish same functionality modules. + +Required properties (DMA function blocks, child node): +- compatible: Should be one of + "mediatek,mt8183-mdp-rdma" + "mediatek,mt8183-mdp-wdma" + "mediatek,mt8183-mdp-wrot" +- mdp-comps(wdma & wrot only): + "mediatek,mt8183-mdp-path" - MDP output path selection, create a + component for path connectedness of HW + pipe control; Align with mdp_comp_of_ids[] + in mtk-mdp3-comp.c. +- mdp-comp-ids(wdma & wrot only): Index of the output paths, the number aligns + with mdp_comp_matches[] in mtk-mdp3-comp.c. +- iommus: should point to the respective IOMMU block with master port as + argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt for + details. +- mediatek,larb: Must contain the local arbiters in the current Socs, see + Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt for + details. + +Required properties (input path selection node): +- compatible: + "mediatek,mt8183-mmsys" - For MDP input/output source selection. +- mdp-comps: + "mediatek,mt8183-mdp-dl" - MDP direct link input path selection, + create a component for path connectedness + of HW pipe control; Align with + mdp_comp_of_ids[] in mtk-mdp3-comp.c. +- mdp-comp-ids: Index of the input paths, the number aligns with + mdp_comp_matches[] in mtk-mdp3-comp.c. +- reg: Physical base address and length of the function block register space. +- clocks: device clocks, see + Documentation/devicetree/bindings/clock/clock-bindings.txt for details. + +Required properties (ISP PASS2 (DIP) module path selection node): +- compatible: + "mediatek,mt8183-imgsys" - For ISP PASS2 (DIP) modules frame sync + control with MDP. +- mdp-comps: + "mediatek,mt8183-mdp-imgi" - Input DMA of ISP PASS2 (DIP) module for + raw image input. + "mediatek,mt8183-mdp-exto" - Output DMA of ISP PASS2 (DIP) module for + yuv image output. +- mdp-comp-ids: Index of the modules, the number aligns with mdp_comp_matches[] + in mtk-mdp3-comp.c. +- reg: Physical base address and length of the function block register space. +- mediatek,mdp-id: HW index to distinguish same functionality modules. + +Example: + mmsys: syscon@14000000 { + compatible = "mediatek,mt8183-mmsys", "syscon"; + mdp-comps = "mediatek,mt8183-mdp-dl", + "mediatek,mt8183-mdp-dl"; + mdp-comp-ids = <0 1>; + reg = <0 0x14000000 0 0x1000>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>; + #clock-cells = <1>; + clocks = <&mmsys CLK_MM_MDP_DL_TXCK>, + <&mmsys CLK_MM_MDP_DL_RX>, + <&mmsys CLK_MM_IPU_DL_TXCK>, + <&mmsys CLK_MM_IPU_DL_RX>; + }; + + mdp_rdma0: mdp-rdma0@14001000 { + compatible = "mediatek,mt8183-mdp-rdma", + "mediatek,mt8183-mdp3"; + mediatek,scp = <&scp>; + mediatek,mdp-id = <0>; + reg = <0 0x14001000 0 0x1000>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x1000 0x1000>; + power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; + clocks = <&mmsys CLK_MM_MDP_RDMA0>, + <&mmsys CLK_MM_MDP_RSZ1>; + iommus = <&iommu M4U_PORT_MDP_RDMA0>; + mediatek,larb = <&larb0>; + mediatek,mmsys = <&mmsys>; + mediatek,mm-mutex = <&mutex>; + mediatek,imgsys = <&imgsys>; + mediatek,mailbox-gce = <&gce>; + mboxes = <&gce 20 CMDQ_THR_PRIO_LOWEST 0>, + <&gce 21 CMDQ_THR_PRIO_LOWEST 0>, + <&gce 22 CMDQ_THR_PRIO_LOWEST 0>, + <&gce 23 CMDQ_THR_PRIO_LOWEST 0>; + gce-subsys = <&gce 0x14000000 SUBSYS_1400XXXX>, + <&gce 0x14010000 SUBSYS_1401XXXX>, + <&gce 0x14020000 SUBSYS_1402XXXX>, + <&gce 0x15020000 SUBSYS_1502XXXX>; + mediatek,gce-events = <CMDQ_EVENT_MDP_RDMA0_SOF>, + <CMDQ_EVENT_MDP_RDMA0_EOF>, + <CMDQ_EVENT_MDP_RSZ0_SOF>, + <CMDQ_EVENT_MDP_RSZ1_SOF>, + <CMDQ_EVENT_MDP_TDSHP_SOF>, + <CMDQ_EVENT_MDP_WROT0_SOF>, + <CMDQ_EVENT_MDP_WROT0_EOF>, + <CMDQ_EVENT_MDP_WDMA0_SOF>, + <CMDQ_EVENT_MDP_WDMA0_EOF>, + <CMDQ_EVENT_ISP_FRAME_DONE_P2_0>, + <CMDQ_EVENT_ISP_FRAME_DONE_P2_1>, + <CMDQ_EVENT_ISP_FRAME_DONE_P2_2>, + <CMDQ_EVENT_ISP_FRAME_DONE_P2_3>, + <CMDQ_EVENT_ISP_FRAME_DONE_P2_4>, + <CMDQ_EVENT_ISP_FRAME_DONE_P2_5>, + <CMDQ_EVENT_ISP_FRAME_DONE_P2_6>, + <CMDQ_EVENT_ISP_FRAME_DONE_P2_7>, + <CMDQ_EVENT_ISP_FRAME_DONE_P2_8>, + <CMDQ_EVENT_ISP_FRAME_DONE_P2_9>, + <CMDQ_EVENT_ISP_FRAME_DONE_P2_10>, + <CMDQ_EVENT_ISP_FRAME_DONE_P2_11>, + <CMDQ_EVENT_ISP_FRAME_DONE_P2_12>, + <CMDQ_EVENT_ISP_FRAME_DONE_P2_13>, + <CMDQ_EVENT_ISP_FRAME_DONE_P2_14>, + <CMDQ_EVENT_WPE_A_DONE>, + <CMDQ_EVENT_SPE_B_DONE>; + }; + + mdp_rsz0: mdp-rsz0@14003000 { + compatible = "mediatek,mt8183-mdp-rsz"; + mediatek,mdp-id = <0>; + reg = <0 0x14003000 0 0x1000>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x3000 0x1000>; + clocks = <&mmsys CLK_MM_MDP_RSZ0>; + }; + + mdp_rsz1: mdp-rsz1@14004000 { + compatible = "mediatek,mt8183-mdp-rsz"; + mediatek,mdp-id = <1>; + reg = <0 0x14004000 0 0x1000>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x4000 0x1000>; + clocks = <&mmsys CLK_MM_MDP_RSZ1>; + }; + + mdp_wrot0: mdp-wrot0@14005000 { + compatible = "mediatek,mt8183-mdp-wrot"; + mediatek,mdp-id = <0>; + mdp-comps = "mediatek,mt8183-mdp-path"; + mdp-comp-ids = <0>; + reg = <0 0x14005000 0 0x1000>; + power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x5000 0x1000>; + clocks = <&mmsys CLK_MM_MDP_WROT0>; + iommus = <&iommu M4U_PORT_MDP_WROT0>; + mediatek,larb = <&larb0>; + }; + + mdp_wdma: mdp-wdma@14006000 { + compatible = "mediatek,mt8183-mdp-wdma"; + mediatek,mdp-id = <0>; + mdp-comps = "mediatek,mt8183-mdp-path"; + mdp-comp-ids = <1>; + reg = <0 0x14006000 0 0x1000>; + power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x6000 0x1000>; + clocks = <&mmsys CLK_MM_MDP_WDMA0>; + iommus = <&iommu M4U_PORT_MDP_WDMA0>; + mediatek,larb = <&larb0>; + }; + + mdp_ccorr: mdp-ccorr@1401c000 { + compatible = "mediatek,mt8183-mdp-ccorr"; + mediatek,mdp-id = <0>; + reg = <0 0x1401c000 0 0x1000>; + mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0xc000 0x1000>; + clocks = <&mmsys CLK_MM_MDP_CCORR>; + }; + + imgsys: syscon@15020000 { + compatible = "mediatek,mt8183-imgsys", "syscon"; + mediatek,mdp-id = <0>; + mdp-comps = "mediatek,mt8183-mdp-imgi", + "mediatek,mt8183-mdp-exto"; + mdp-comp-ids = <0 1>; + reg = <0 0x15020000 0 0x1000>; + mediatek,gce-client-reg = <&gce SUBSYS_1502XXXX 0 0x1000>; + #clock-cells = <1>; + }; -- 2.18.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH v4 1/4] dt-binding: mt8183: Add Mediatek MDP3 dt-bindings 2020-11-20 2:29 ` [PATCH v4 1/4] dt-binding: mt8183: Add Mediatek MDP3 dt-bindings Daoyuan Huang @ 2020-11-20 14:41 ` Chun-Kuang Hu 2020-12-01 1:35 ` Rob Herring 1 sibling, 0 replies; 7+ messages in thread From: Chun-Kuang Hu @ 2020-11-20 14:41 UTC (permalink / raw) To: Daoyuan Huang Cc: Maoguang Meng, Geert Uytterhoeven, DTML, Laurent Pinchart, Nicolas Boichat, Krzysztof Kozlowski, Ping-Hsun Wu, linux-media, menghui.lin, Sj Huang (黃信璋), Rob Herring, moderated list:ARM/Mediatek SoC support, pihsun, Matthias Brugger, Mauro Carvalho Chehab, Linux ARM, Jernej Skrabec, randy.wu, acourbot, srv_heupstream, linux-kernel, Tomasz Figa, ben.lok, moudy.ho, Rob Landley, Hans Verkuil Hi, Daoyuan: Daoyuan Huang <daoyuan.huang@mediatek.com> 於 2020年11月20日 週五 上午10:41寫道： > > From: daoyuan huang <daoyuan.huang@mediatek.com> > > This patch adds DT binding document for Media Data Path 3 (MDP3) > a unit in multimedia system used for scaling and color format convert. > > Signed-off-by: Ping-Hsun Wu <ping-hsun.wu@mediatek.com> > Signed-off-by: daoyuan huang <daoyuan.huang@mediatek.com> > --- > .../bindings/media/mediatek,mt8183-mdp3.txt | 208 ++++++++++++++++++ > 1 file changed, 208 insertions(+) > create mode 100644 Documentation/devicetree/bindings/media/mediatek,mt8183-mdp3.txt > > diff --git a/Documentation/devicetree/bindings/media/mediatek,mt8183-mdp3.txt b/Documentation/devicetree/bindings/media/mediatek,mt8183-mdp3.txt > new file mode 100644 > index 000000000000..d4db908b8b53 > --- /dev/null > +++ b/Documentation/devicetree/bindings/media/mediatek,mt8183-mdp3.txt > @@ -0,0 +1,208 @@ > +* Mediatek Media Data Path 3 > + > +Media Data Path 3 (MDP3) is used for scaling and color space conversion. > + > +Required properties (controller node): > +- compatible: "mediatek,mt8183-mdp3" > +- mediatek,scp: the node of system control processor (SCP), using the > + remoteproc & rpmsg framework, see > + Documentation/devicetree/bindings/remoteproc/mtk,scp.txt for details. > +- mediatek,mmsys: the node of mux(multiplexer) controller for HW connections. > +- mediatek,mm-mutex: the node of sof(start of frame) signal controller. > +- mediatek,mailbox-gce: the node of global command engine (GCE), used to > + read/write registers with critical time limitation, see > + Documentation/devicetree/bindings/mailbox/mtk-gce.txt for details. > +- mboxes: mailbox number used to communicate with GCE. > +- gce-subsys: sub-system id corresponding to the register address. This is already defined in mediatek,gce-client-reg, so remove this. > +- gce-event-names: in use event name list, used to correspond to event IDs. > +- gce-events: in use event IDs list, all IDs are defined in > + 'dt-bindings/gce/mt8183-gce.h'. > + > +Required properties (all function blocks, child node): > +- compatible: Should be one of > + "mediatek,mt8183-mdp-rdma" - read DMA > + "mediatek,mt8183-mdp-rsz" - resizer > + "mediatek,mt8183-mdp-wdma" - write DMA > + "mediatek,mt8183-mdp-wrot" - write DMA with rotation > + "mediatek,mt8183-mdp-ccorr" - color correction with 3X3 matrix > +- reg: Physical base address and length of the function block register space. > +- clocks: device clocks, see > + Documentation/devicetree/bindings/clock/clock-bindings.txt for details. > +- power-domains: A phandle to the power domain, see > + Documentation/devicetree/bindings/power/power_domain.txt for details. > +- mediatek,mdp-id: HW index to distinguish same functionality modules. > + > +Required properties (DMA function blocks, child node): > +- compatible: Should be one of > + "mediatek,mt8183-mdp-rdma" > + "mediatek,mt8183-mdp-wdma" > + "mediatek,mt8183-mdp-wrot" > +- mdp-comps(wdma & wrot only): > + "mediatek,mt8183-mdp-path" - MDP output path selection, create a > + component for path connectedness of HW > + pipe control; Align with mdp_comp_of_ids[] > + in mtk-mdp3-comp.c. > +- mdp-comp-ids(wdma & wrot only): Index of the output paths, the number aligns > + with mdp_comp_matches[] in mtk-mdp3-comp.c. > +- iommus: should point to the respective IOMMU block with master port as > + argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt for > + details. > +- mediatek,larb: Must contain the local arbiters in the current Socs, see > + Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt for > + details. > + > +Required properties (input path selection node): > +- compatible: > + "mediatek,mt8183-mmsys" - For MDP input/output source selection. mmsys is defined in mediatek,mmsys.txt [1], so move this there. [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt?h=v5.10-rc4 > +- mdp-comps: > + "mediatek,mt8183-mdp-dl" - MDP direct link input path selection, > + create a component for path connectedness > + of HW pipe control; Align with > + mdp_comp_of_ids[] in mtk-mdp3-comp.c. > +- mdp-comp-ids: Index of the input paths, the number aligns with > + mdp_comp_matches[] in mtk-mdp3-comp.c. > +- reg: Physical base address and length of the function block register space. > +- clocks: device clocks, see > + Documentation/devicetree/bindings/clock/clock-bindings.txt for details. > + > +Required properties (ISP PASS2 (DIP) module path selection node): > +- compatible: > + "mediatek,mt8183-imgsys" - For ISP PASS2 (DIP) modules frame sync > + control with MDP. imgsys is defined in mediatek,imgsys.txt [2], so move this there. [2] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt?h=v5.10-rc4 > +- mdp-comps: > + "mediatek,mt8183-mdp-imgi" - Input DMA of ISP PASS2 (DIP) module for > + raw image input. > + "mediatek,mt8183-mdp-exto" - Output DMA of ISP PASS2 (DIP) module for > + yuv image output. > +- mdp-comp-ids: Index of the modules, the number aligns with mdp_comp_matches[] > + in mtk-mdp3-comp.c. > +- reg: Physical base address and length of the function block register space. > +- mediatek,mdp-id: HW index to distinguish same functionality modules. > + > +Example: > + mmsys: syscon@14000000 { > + compatible = "mediatek,mt8183-mmsys", "syscon"; > + mdp-comps = "mediatek,mt8183-mdp-dl", > + "mediatek,mt8183-mdp-dl"; > + mdp-comp-ids = <0 1>; > + reg = <0 0x14000000 0 0x1000>; > + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>; > + #clock-cells = <1>; > + clocks = <&mmsys CLK_MM_MDP_DL_TXCK>, > + <&mmsys CLK_MM_MDP_DL_RX>, > + <&mmsys CLK_MM_IPU_DL_TXCK>, > + <&mmsys CLK_MM_IPU_DL_RX>; > + }; > + > + mdp_rdma0: mdp-rdma0@14001000 { > + compatible = "mediatek,mt8183-mdp-rdma", > + "mediatek,mt8183-mdp3"; > + mediatek,scp = <&scp>; > + mediatek,mdp-id = <0>; > + reg = <0 0x14001000 0 0x1000>; > + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x1000 0x1000>; > + power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > + clocks = <&mmsys CLK_MM_MDP_RDMA0>, > + <&mmsys CLK_MM_MDP_RSZ1>; Why place CLK_MM_MDP_RSZ1 in mdp_rdma0 device? > + iommus = <&iommu M4U_PORT_MDP_RDMA0>; > + mediatek,larb = <&larb0>; > + mediatek,mmsys = <&mmsys>; > + mediatek,mm-mutex = <&mutex>; > + mediatek,imgsys = <&imgsys>; > + mediatek,mailbox-gce = <&gce>; > + mboxes = <&gce 20 CMDQ_THR_PRIO_LOWEST 0>, > + <&gce 21 CMDQ_THR_PRIO_LOWEST 0>, > + <&gce 22 CMDQ_THR_PRIO_LOWEST 0>, > + <&gce 23 CMDQ_THR_PRIO_LOWEST 0>; > + gce-subsys = <&gce 0x14000000 SUBSYS_1400XXXX>, > + <&gce 0x14010000 SUBSYS_1401XXXX>, > + <&gce 0x14020000 SUBSYS_1402XXXX>, > + <&gce 0x15020000 SUBSYS_1502XXXX>; > + mediatek,gce-events = <CMDQ_EVENT_MDP_RDMA0_SOF>, > + <CMDQ_EVENT_MDP_RDMA0_EOF>, > + <CMDQ_EVENT_MDP_RSZ0_SOF>, mdp_rsz0 send CMDQ_EVENT_MDP_RSZ0_SOF to gce, so move CMDQ_EVENT_MDP_RSZ0_SOF to mdp_rsz0. > + <CMDQ_EVENT_MDP_RSZ1_SOF>, > + <CMDQ_EVENT_MDP_TDSHP_SOF>, > + <CMDQ_EVENT_MDP_WROT0_SOF>, > + <CMDQ_EVENT_MDP_WROT0_EOF>, > + <CMDQ_EVENT_MDP_WDMA0_SOF>, > + <CMDQ_EVENT_MDP_WDMA0_EOF>, > + <CMDQ_EVENT_ISP_FRAME_DONE_P2_0>, > + <CMDQ_EVENT_ISP_FRAME_DONE_P2_1>, > + <CMDQ_EVENT_ISP_FRAME_DONE_P2_2>, > + <CMDQ_EVENT_ISP_FRAME_DONE_P2_3>, > + <CMDQ_EVENT_ISP_FRAME_DONE_P2_4>, > + <CMDQ_EVENT_ISP_FRAME_DONE_P2_5>, > + <CMDQ_EVENT_ISP_FRAME_DONE_P2_6>, > + <CMDQ_EVENT_ISP_FRAME_DONE_P2_7>, > + <CMDQ_EVENT_ISP_FRAME_DONE_P2_8>, > + <CMDQ_EVENT_ISP_FRAME_DONE_P2_9>, > + <CMDQ_EVENT_ISP_FRAME_DONE_P2_10>, > + <CMDQ_EVENT_ISP_FRAME_DONE_P2_11>, > + <CMDQ_EVENT_ISP_FRAME_DONE_P2_12>, > + <CMDQ_EVENT_ISP_FRAME_DONE_P2_13>, > + <CMDQ_EVENT_ISP_FRAME_DONE_P2_14>, > + <CMDQ_EVENT_WPE_A_DONE>, warp send CMDQ_EVENT_WPE_A_DONE to gce, so move CMDQ_EVENT_WPE_A_DONE to warp device. Regards, Chun-Kuang. > + <CMDQ_EVENT_SPE_B_DONE>; > + }; > + > + mdp_rsz0: mdp-rsz0@14003000 { > + compatible = "mediatek,mt8183-mdp-rsz"; > + mediatek,mdp-id = <0>; > + reg = <0 0x14003000 0 0x1000>; > + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x3000 0x1000>; > + clocks = <&mmsys CLK_MM_MDP_RSZ0>; > + }; > + > + mdp_rsz1: mdp-rsz1@14004000 { > + compatible = "mediatek,mt8183-mdp-rsz"; > + mediatek,mdp-id = <1>; > + reg = <0 0x14004000 0 0x1000>; > + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x4000 0x1000>; > + clocks = <&mmsys CLK_MM_MDP_RSZ1>; > + }; > + > + mdp_wrot0: mdp-wrot0@14005000 { > + compatible = "mediatek,mt8183-mdp-wrot"; > + mediatek,mdp-id = <0>; > + mdp-comps = "mediatek,mt8183-mdp-path"; > + mdp-comp-ids = <0>; > + reg = <0 0x14005000 0 0x1000>; > + power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x5000 0x1000>; > + clocks = <&mmsys CLK_MM_MDP_WROT0>; > + iommus = <&iommu M4U_PORT_MDP_WROT0>; > + mediatek,larb = <&larb0>; > + }; > + > + mdp_wdma: mdp-wdma@14006000 { > + compatible = "mediatek,mt8183-mdp-wdma"; > + mediatek,mdp-id = <0>; > + mdp-comps = "mediatek,mt8183-mdp-path"; > + mdp-comp-ids = <1>; > + reg = <0 0x14006000 0 0x1000>; > + power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x6000 0x1000>; > + clocks = <&mmsys CLK_MM_MDP_WDMA0>; > + iommus = <&iommu M4U_PORT_MDP_WDMA0>; > + mediatek,larb = <&larb0>; > + }; > + > + mdp_ccorr: mdp-ccorr@1401c000 { > + compatible = "mediatek,mt8183-mdp-ccorr"; > + mediatek,mdp-id = <0>; > + reg = <0 0x1401c000 0 0x1000>; > + mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0xc000 0x1000>; > + clocks = <&mmsys CLK_MM_MDP_CCORR>; > + }; > + > + imgsys: syscon@15020000 { > + compatible = "mediatek,mt8183-imgsys", "syscon"; > + mediatek,mdp-id = <0>; > + mdp-comps = "mediatek,mt8183-mdp-imgi", > + "mediatek,mt8183-mdp-exto"; > + mdp-comp-ids = <0 1>; > + reg = <0 0x15020000 0 0x1000>; > + mediatek,gce-client-reg = <&gce SUBSYS_1502XXXX 0 0x1000>; > + #clock-cells = <1>; > + }; > -- > 2.18.0 > _______________________________________________ > Linux-mediatek mailing list > Linux-mediatek@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-mediatek _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v4 1/4] dt-binding: mt8183: Add Mediatek MDP3 dt-bindings 2020-11-20 2:29 ` [PATCH v4 1/4] dt-binding: mt8183: Add Mediatek MDP3 dt-bindings Daoyuan Huang 2020-11-20 14:41 ` Chun-Kuang Hu @ 2020-12-01 1:35 ` Rob Herring 1 sibling, 0 replies; 7+ messages in thread From: Rob Herring @ 2020-12-01 1:35 UTC (permalink / raw) To: Daoyuan Huang Cc: Maoguang Meng, Geert Uytterhoeven, menghui.lin, Laurent Pinchart, drinkcat, Krzysztof Kozlowski, Ping-Hsun Wu, linux-media, devicetree, sj.huang, linux-mediatek, pihsun, Matthias Brugger, Mauro Carvalho Chehab, linux-arm-kernel, Jernej Skrabec, randy.wu, srv_heupstream, acourbot, linux-kernel, tfiga, ben.lok, moudy.ho, Rob Landley, Hans Verkuil On Fri, Nov 20, 2020 at 10:29:03AM +0800, Daoyuan Huang wrote: > From: daoyuan huang <daoyuan.huang@mediatek.com> > > This patch adds DT binding document for Media Data Path 3 (MDP3) > a unit in multimedia system used for scaling and color format convert. > > Signed-off-by: Ping-Hsun Wu <ping-hsun.wu@mediatek.com> > Signed-off-by: daoyuan huang <daoyuan.huang@mediatek.com> > --- > .../bindings/media/mediatek,mt8183-mdp3.txt | 208 ++++++++++++++++++ > 1 file changed, 208 insertions(+) > create mode 100644 Documentation/devicetree/bindings/media/mediatek,mt8183-mdp3.txt In the year since last posting, DT bindings are now in schema format. Rob _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v4 2/4] dts: arm64: mt8183: Add Mediatek MDP3 nodes 2020-11-20 2:29 [PATCH v4 0/4] media: mediatek: support mdp3 on mt8183 platform Daoyuan Huang 2020-11-20 2:29 ` [PATCH v4 1/4] dt-binding: mt8183: Add Mediatek MDP3 dt-bindings Daoyuan Huang @ 2020-11-20 2:29 ` Daoyuan Huang 2020-11-20 15:15 ` Fabien Parent 2020-11-20 2:29 ` [PATCH v4 3/4] media: platform: Add Mediatek MDP3 driver KConfig Daoyuan Huang 2 siblings, 1 reply; 7+ messages in thread From: Daoyuan Huang @ 2020-11-20 2:29 UTC (permalink / raw) To: Mauro Carvalho Chehab, Rob Herring, Matthias Brugger, Hans Verkuil, Jernej Skrabec Cc: Maoguang Meng, Geert Uytterhoeven, menghui.lin, Laurent Pinchart, drinkcat, Krzysztof Kozlowski, Ping-Hsun Wu, linux-media, devicetree, daoyuan huang, sj.huang, linux-mediatek, pihsun, linux-arm-kernel, randy.wu, srv_heupstream, acourbot, linux-kernel, tfiga, ben.lok, moudy.ho, Rob Landley From: daoyuan huang <daoyuan.huang@mediatek.com> Add device nodes for Media Data Path 3 (MDP3) modules. Signed-off-by: Ping-Hsun Wu <ping-hsun.wu@mediatek.com> Signed-off-by: daoyuan huang <daoyuan.huang@mediatek.com> --- Depend on: [1] https://lore.kernel.org/patchwork/patch/1164746/ [2] https://patchwork.kernel.org/patch/11703299/ [3] https://patchwork.kernel.org/patch/11283773/ --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 116 +++++++++++++++++++++++ 1 file changed, 116 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 8fed72bb35d7..fdd809883ce7 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -6,6 +6,7 @@ */ #include <dt-bindings/clock/mt8183-clk.h> +#include <dt-bindings/gce/mt8183-gce.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/reset-controller/mt8183-resets.h> @@ -712,13 +713,128 @@ mmsys: syscon@14000000 { compatible = "mediatek,mt8183-mmsys", "syscon"; + mdp-comps = "mediatek,mt8183-mdp-dl", + "mediatek,mt8183-mdp-dl"; + mdp-comp-ids = <0 1>; reg = <0 0x14000000 0 0x1000>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>; #clock-cells = <1>; + clocks = <&mmsys CLK_MM_MDP_DL_TXCK>, + <&mmsys CLK_MM_MDP_DL_RX>, + <&mmsys CLK_MM_IPU_DL_TXCK>, + <&mmsys CLK_MM_IPU_DL_RX>; + }; + + mdp_rdma0: mdp-rdma0@14001000 { + compatible = "mediatek,mt8183-mdp-rdma", + "mediatek,mt8183-mdp3"; + mediatek,scp = <&scp>; + mediatek,mdp-id = <0>; + reg = <0 0x14001000 0 0x1000>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x1000 0x1000>; + power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; + clocks = <&mmsys CLK_MM_MDP_RDMA0>, + <&mmsys CLK_MM_MDP_RSZ1>; + iommus = <&iommu M4U_PORT_MDP_RDMA0>; + mediatek,larb = <&larb0>; + mediatek,mmsys = <&mmsys>; + mediatek,mm-mutex = <&mutex>; + mediatek,imgsys = <&imgsys>; + mediatek,mailbox-gce = <&gce>; + mboxes = <&gce 20 CMDQ_THR_PRIO_LOWEST 0>, + <&gce 21 CMDQ_THR_PRIO_LOWEST 0>, + <&gce 22 CMDQ_THR_PRIO_LOWEST 0>, + <&gce 23 CMDQ_THR_PRIO_LOWEST 0>; + gce-subsys = <&gce 0x14000000 SUBSYS_1400XXXX>, + <&gce 0x14010000 SUBSYS_1401XXXX>, + <&gce 0x14020000 SUBSYS_1402XXXX>, + <&gce 0x15020000 SUBSYS_1502XXXX>; + mediatek,gce-events = <CMDQ_EVENT_MDP_RDMA0_SOF>, + <CMDQ_EVENT_MDP_RDMA0_EOF>, + <CMDQ_EVENT_MDP_RSZ0_SOF>, + <CMDQ_EVENT_MDP_RSZ1_SOF>, + <CMDQ_EVENT_MDP_TDSHP_SOF>, + <CMDQ_EVENT_MDP_WROT0_SOF>, + <CMDQ_EVENT_MDP_WROT0_EOF>, + <CMDQ_EVENT_MDP_WDMA0_SOF>, + <CMDQ_EVENT_MDP_WDMA0_EOF>, + <CMDQ_EVENT_ISP_FRAME_DONE_P2_0>, + <CMDQ_EVENT_ISP_FRAME_DONE_P2_1>, + <CMDQ_EVENT_ISP_FRAME_DONE_P2_2>, + <CMDQ_EVENT_ISP_FRAME_DONE_P2_3>, + <CMDQ_EVENT_ISP_FRAME_DONE_P2_4>, + <CMDQ_EVENT_ISP_FRAME_DONE_P2_5>, + <CMDQ_EVENT_ISP_FRAME_DONE_P2_6>, + <CMDQ_EVENT_ISP_FRAME_DONE_P2_7>, + <CMDQ_EVENT_ISP_FRAME_DONE_P2_8>, + <CMDQ_EVENT_ISP_FRAME_DONE_P2_9>, + <CMDQ_EVENT_ISP_FRAME_DONE_P2_10>, + <CMDQ_EVENT_ISP_FRAME_DONE_P2_11>, + <CMDQ_EVENT_ISP_FRAME_DONE_P2_12>, + <CMDQ_EVENT_ISP_FRAME_DONE_P2_13>, + <CMDQ_EVENT_ISP_FRAME_DONE_P2_14>, + <CMDQ_EVENT_WPE_A_DONE>, + <CMDQ_EVENT_SPE_B_DONE>; + }; + + mdp_rsz0: mdp-rsz0@14003000 { + compatible = "mediatek,mt8183-mdp-rsz"; + mediatek,mdp-id = <0>; + reg = <0 0x14003000 0 0x1000>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x3000 0x1000>; + clocks = <&mmsys CLK_MM_MDP_RSZ0>; + }; + + mdp_rsz1: mdp-rsz1@14004000 { + compatible = "mediatek,mt8183-mdp-rsz"; + mediatek,mdp-id = <1>; + reg = <0 0x14004000 0 0x1000>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x4000 0x1000>; + clocks = <&mmsys CLK_MM_MDP_RSZ1>; + }; + + mdp_wrot0: mdp-wrot0@14005000 { + compatible = "mediatek,mt8183-mdp-wrot"; + mediatek,mdp-id = <0>; + mdp-comps = "mediatek,mt8183-mdp-path"; + mdp-comp-ids = <0>; + reg = <0 0x14005000 0 0x1000>; + power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x5000 0x1000>; + clocks = <&mmsys CLK_MM_MDP_WROT0>; + iommus = <&iommu M4U_PORT_MDP_WROT0>; + mediatek,larb = <&larb0>; + }; + + mdp_wdma: mdp-wdma@14006000 { + compatible = "mediatek,mt8183-mdp-wdma"; + mediatek,mdp-id = <0>; + mdp-comps = "mediatek,mt8183-mdp-path"; + mdp-comp-ids = <1>; + reg = <0 0x14006000 0 0x1000>; + power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x6000 0x1000>; + clocks = <&mmsys CLK_MM_MDP_WDMA0>; + iommus = <&iommu M4U_PORT_MDP_WDMA0>; + mediatek,larb = <&larb0>; + }; + + mdp_ccorr: mdp-ccorr@1401c000 { + compatible = "mediatek,mt8183-mdp-ccorr"; + mediatek,mdp-id = <0>; + reg = <0 0x1401c000 0 0x1000>; + mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0xc000 0x1000>; + clocks = <&mmsys CLK_MM_MDP_CCORR>; }; imgsys: syscon@15020000 { compatible = "mediatek,mt8183-imgsys", "syscon"; + mediatek,mdp-id = <0>; + mdp-comps = "mediatek,mt8183-mdp-imgi", + "mediatek,mt8183-mdp-exto"; + mdp-comp-ids = <0 1>; reg = <0 0x15020000 0 0x1000>; + mediatek,gce-client-reg = <&gce SUBSYS_1502XXXX 0 0x1000>; #clock-cells = <1>; }; -- 2.18.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH v4 2/4] dts: arm64: mt8183: Add Mediatek MDP3 nodes 2020-11-20 2:29 ` [PATCH v4 2/4] dts: arm64: mt8183: Add Mediatek MDP3 nodes Daoyuan Huang @ 2020-11-20 15:15 ` Fabien Parent 0 siblings, 0 replies; 7+ messages in thread From: Fabien Parent @ 2020-11-20 15:15 UTC (permalink / raw) To: Daoyuan Huang Cc: Maoguang Meng, Geert Uytterhoeven, DTML, Laurent Pinchart, Nicolas Boichat, Krzysztof Kozlowski, Ping-Hsun Wu, linux-media, menghui.lin, sj.huang, Rob Herring, moderated list:ARM/Mediatek SoC support, pihsun, Matthias Brugger, Mauro Carvalho Chehab, Linux ARM, Jernej Skrabec, randy.wu, acourbot, srv_heupstream, linux-kernel, tfiga, ben.lok, moudy.ho, Rob Landley, Hans Verkuil Hi Daoyuan, > Depend on: > [1] https://lore.kernel.org/patchwork/patch/1164746/ > [2] https://patchwork.kernel.org/patch/11703299/ > [3] https://patchwork.kernel.org/patch/11283773/ Can you provide an updated list of dependencies because it seems this patch depends on more than the patch aboves. I applied the related patch series above but there is still missing node ERROR (phandle_references): /soc/mdp-rdma0@14001000: Reference to non-existent node or label "scp" ERROR (phandle_references): /soc/mdp-rdma0@14001000: Reference to non-existent node or label "mutex" It would be even better if you could provide a branch with all the dependencies included. > mmsys: syscon@14000000 { > compatible = "mediatek,mt8183-mmsys", "syscon"; > + mdp-comps = "mediatek,mt8183-mdp-dl", > + "mediatek,mt8183-mdp-dl"; > + mdp-comp-ids = <0 1>; > reg = <0 0x14000000 0 0x1000>; > + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>; > #clock-cells = <1>; > + clocks = <&mmsys CLK_MM_MDP_DL_TXCK>, > + <&mmsys CLK_MM_MDP_DL_RX>, > + <&mmsys CLK_MM_IPU_DL_TXCK>, > + <&mmsys CLK_MM_IPU_DL_RX>; > + }; The kernel is not booting anymore when the 4 clocks above are added, if I remove them I can boot again. See the following log: [ 0.401314] Unable to handle kernel paging request at virtual address fffffffffffffffe [ 0.402320] Mem abort info: [ 0.402674] ESR = 0x96000004 [ 0.403062] EC = 0x25: DABT (current EL), IL = 32 bits [ 0.403741] SET = 0, FnV = 0 [ 0.404128] EA = 0, S1PTW = 0 [ 0.404526] Data abort info: [ 0.404890] ISV = 0, ISS = 0x00000004 [ 0.405374] CM = 0, WnR = 0 [ 0.405751] swapper pgtable: 4k pages, 48-bit VAs, pgdp=00000000415ee000 [ 0.406595] [fffffffffffffffe] pgd=0000000000000000, p4d=0000000000000000 [ 0.407457] Internal error: Oops: 96000004 [#1] PREEMPT SMP [ 0.408160] Modules linked in: [ 0.408551] CPU: 4 PID: 51 Comm: kworker/4:1 Not tainted 5.9.0-mtk-00010-g121ba830623e-dirty #2 [ 0.409646] Hardware name: MediaTek MT8183 evaluation board (DT) [ 0.410416] Workqueue: events deferred_probe_work_func [ 0.411067] pstate: 20000005 (nzCv daif -PAN -UAO BTYPE=--) [ 0.411772] pc : clk_prepare+0x18/0x44 [ 0.412252] lr : scpsys_power_on+0x1e8/0x470 [ 0.412791] sp : ffff800011fa3a20 [ 0.413209] x29: ffff800011fa3a20 x28: 0000000000000000 [ 0.413881] x27: 0000000000000000 x26: 0000000000000000 [ 0.414551] x25: ffff00007a23ade0 x24: ffff00007a223b80 [ 0.415222] x23: ffff800011f5d30c x22: ffff00007a23a888 [ 0.415892] x21: fffffffffffffffe x20: 0000000000000000 [ 0.416563] x19: 0000000000000000 x18: 0000000000000020 [ 0.417233] x17: 0000000000000020 x16: 0000000052d9c4c7 [ 0.417904] x15: 0000000000000059 x14: ffff00007a23a640 [ 0.418575] x13: ffff00007a23a5c0 x12: 0000000000000000 [ 0.419245] x11: ffff8000108331c0 x10: ffff800010833030 [ 0.419916] x9 : 0000000000000000 x8 : ffff00007a751c00 [ 0.420587] x7 : ffff800011fa3a70 x6 : 00000000130f968d [ 0.421257] x5 : ffff8000110043f0 x4 : 0000000000000184 [ 0.421927] x3 : 0000000000000000 x2 : 0000000000000008 [ 0.422598] x1 : 000000000000000d x0 : fffffffffffffffe [ 0.423268] Call trace: [ 0.423581] clk_prepare+0x18/0x44 [ 0.424014] scpsys_power_on+0x1e8/0x470 [ 0.424511] scpsys_probe+0x3f4/0x66c [ 0.424975] platform_drv_probe+0x54/0xb0 [ 0.425483] really_probe+0xe4/0x490 [ 0.425937] driver_probe_device+0x58/0xc0 [ 0.426456] __device_attach_driver+0xa8/0x10c [ 0.427019] bus_for_each_drv+0x78/0xcc [ 0.427504] __device_attach+0xdc/0x180 [ 0.427990] device_initial_probe+0x14/0x20 [ 0.428521] bus_probe_device+0x9c/0xa4 [ 0.429007] deferred_probe_work_func+0x74/0xb0 [ 0.429582] process_one_work+0x1cc/0x350 [ 0.430090] worker_thread+0x2c0/0x470 [ 0.430565] kthread+0x154/0x160 [ 0.430976] ret_from_fork+0x10/0x30 [ 0.431431] Code: 910003fd f9000bf3 52800013 b40000e0 (f9400013) [ 0.432200] ---[ end trace d3ecf925b254a559 ]--- _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v4 3/4] media: platform: Add Mediatek MDP3 driver KConfig 2020-11-20 2:29 [PATCH v4 0/4] media: mediatek: support mdp3 on mt8183 platform Daoyuan Huang 2020-11-20 2:29 ` [PATCH v4 1/4] dt-binding: mt8183: Add Mediatek MDP3 dt-bindings Daoyuan Huang 2020-11-20 2:29 ` [PATCH v4 2/4] dts: arm64: mt8183: Add Mediatek MDP3 nodes Daoyuan Huang @ 2020-11-20 2:29 ` Daoyuan Huang 2 siblings, 0 replies; 7+ messages in thread From: Daoyuan Huang @ 2020-11-20 2:29 UTC (permalink / raw) To: Mauro Carvalho Chehab, Rob Herring, Matthias Brugger, Hans Verkuil, Jernej Skrabec Cc: Maoguang Meng, Geert Uytterhoeven, menghui.lin, Laurent Pinchart, drinkcat, Krzysztof Kozlowski, Ping-Hsun Wu, linux-media, devicetree, daoyuan huang, sj.huang, linux-mediatek, pihsun, linux-arm-kernel, randy.wu, srv_heupstream, acourbot, linux-kernel, tfiga, ben.lok, moudy.ho, Rob Landley From: daoyuan huang <daoyuan.huang@mediatek.com> This patch adds Kconfig for Mediatek Media Data Path 3 (MDP3) driver. MDP3 is used to do scaling and color format conversion. Signed-off-by: Ping-Hsun Wu <ping-hsun.wu@mediatek.com> Signed-off-by: daoyuan huang <daoyuan.huang@mediatek.com> --- drivers/media/platform/Kconfig | 17 +++++++++++++++++ drivers/media/platform/Makefile | 2 ++ 2 files changed, 19 insertions(+) diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig index c57ee78fa99d..2eb8ecab4fb8 100644 --- a/drivers/media/platform/Kconfig +++ b/drivers/media/platform/Kconfig @@ -248,6 +248,23 @@ config VIDEO_MEDIATEK_MDP To compile this driver as a module, choose M here: the module will be called mtk-mdp. +config VIDEO_MEDIATEK_MDP3 + depends on MTK_IOMMU || COMPILE_TEST + depends on VIDEO_DEV && VIDEO_V4L2 + depends on ARCH_MEDIATEK || COMPILE_TEST + depends on MTK_SCP && MTK_CMDQ + tristate "Mediatek MDP3 driver" + select VIDEOBUF2_DMA_CONTIG + select V4L2_MEM2MEM_DEV + select VIDEO_MEDIATEK_VPU + help + It is a v4l2 driver and present in Mediatek MT8183 SoCs. + The driver supports for scaling and color space conversion. + Supports ISP PASS2(DIP) direct link for yuv image output. + + To compile this driver as a module, choose M here: the + module will be called mtk-mdp3. + config VIDEO_MEDIATEK_VCODEC tristate "Mediatek Video Codec driver" depends on MTK_IOMMU || COMPILE_TEST diff --git a/drivers/media/platform/Makefile b/drivers/media/platform/Makefile index 62b6cdc8c730..36559eaf2607 100644 --- a/drivers/media/platform/Makefile +++ b/drivers/media/platform/Makefile @@ -73,6 +73,8 @@ obj-$(CONFIG_VIDEO_MEDIATEK_VCODEC) += mtk-vcodec/ obj-$(CONFIG_VIDEO_MEDIATEK_MDP) += mtk-mdp/ +obj-$(CONFIG_VIDEO_MEDIATEK_MDP3) += mtk-mdp3/ + obj-$(CONFIG_VIDEO_MEDIATEK_JPEG) += mtk-jpeg/ obj-$(CONFIG_VIDEO_QCOM_CAMSS) += qcom/camss/ -- 2.18.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 7+ messages in thread
end of thread, other threads:[~2020-12-01 1:37 UTC | newest] Thread overview: 7+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2020-11-20 2:29 [PATCH v4 0/4] media: mediatek: support mdp3 on mt8183 platform Daoyuan Huang 2020-11-20 2:29 ` [PATCH v4 1/4] dt-binding: mt8183: Add Mediatek MDP3 dt-bindings Daoyuan Huang 2020-11-20 14:41 ` Chun-Kuang Hu 2020-12-01 1:35 ` Rob Herring 2020-11-20 2:29 ` [PATCH v4 2/4] dts: arm64: mt8183: Add Mediatek MDP3 nodes Daoyuan Huang 2020-11-20 15:15 ` Fabien Parent 2020-11-20 2:29 ` [PATCH v4 3/4] media: platform: Add Mediatek MDP3 driver KConfig Daoyuan Huang
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