From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 82C07C64E90 for ; Tue, 1 Dec 2020 13:15:12 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0AF7320637 for ; Tue, 1 Dec 2020 13:15:11 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="hGmq58HO"; dkim=temperror (0-bit key) header.d=cerno.tech header.i=@cerno.tech header.b="sZQjvEP4"; dkim=temperror (0-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="Co+aUYBI" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0AF7320637 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=cerno.tech Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=zfPm1tMGplpB6W/Gs2nYa6M7rlIVgl7IBlgd46t2y0g=; b=hGmq58HOoy8P4sPEN07Fg8XXy 6srXkLGwgKEB0DpibI9kqBJfvkBu3el6RP43vHZxVoJoPEcFqhuJSQEO9xmUOLAO8R+5BuAp54NDn 9UXcc4AtWyX01Rb37chj+DsE/yKqRui0DhqKE0UhlU16/NAMs41iuJZXyxXI0rWxwT0Y4+V6rCPHW i8gIl2mJTj0VJ4+BK6mJurohUuaoN6BAFx822uB5sANd123QUAA6hpZuV+pjE+G3rZmRXtlZ4ICNv KjFzkxcl4aSRonK7e0X7GUiKpHpi7rdaxmNyCduSrMUEr/Q4QxDuu6Y0tS5rGAp6B2skxW3JxkUEh +LnJQNliQ==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kk5T1-000865-O1; Tue, 01 Dec 2020 13:13:15 +0000 Received: from new4-smtp.messagingengine.com ([66.111.4.230]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kk5Sl-00081Y-80; Tue, 01 Dec 2020 13:13:02 +0000 Received: from compute6.internal (compute6.nyi.internal [10.202.2.46]) by mailnew.nyi.internal (Postfix) with ESMTP id 6D4F55805D1; Tue, 1 Dec 2020 08:12:58 -0500 (EST) Received: from mailfrontend2 ([10.202.2.163]) by compute6.internal (MEProxy); Tue, 01 Dec 2020 08:12:58 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cerno.tech; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; s=fm1; bh=+dEIWqAdGUsmY BC0AS/PefmsgsJjaYz2FoM4Ey5HcCo=; b=sZQjvEP4jTYTIy3pFVN7tUQS2n68a 0/EMFgmTHKZKHEpGXa1FTP4IPOgiEgvzyIfHIO/xuW2pV+YUvDYUOtydBkDuExKx tAu27+3VtuU/zA8gqrIrb+wlPjWWeS7joP89H6q03YMfg0S+HDY57MggUyHjxLcQ ooOAoknEruHB+KZBjZhRlXWO6dXxccflVrfQ7VZ9/VxLpwN7ZxBkDnhCjWhvQ8V/ ISt3mBAgmP04QOBnMCI1ippGR/nDjBtEZxXcgzqo4rDgO9F6GI8cb6cLqHIncVNi hEZI8ZixOtld5jQBFBQJFAL71UL/VTh2cS7xJ8pWrlyycMxiHCKMQ0XuA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:date:from :in-reply-to:message-id:mime-version:references:subject:to :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm1; bh=+dEIWqAdGUsmYBC0AS/PefmsgsJjaYz2FoM4Ey5HcCo=; b=Co+aUYBI Os5sBsij1HPg8C71gkz18KRrzwHdtXFs07OZSNacpL0hDtfKiV8bM4WwBhgWB136 lBv0xEREfwN4GG1YJbdJ+NU2zsWp0M7Tgm528X+FP/f0zFf8e5+0rtyYaQs9vb1D 2+9CSP/la8/nYgMKoJmmpw9ksBE5hhulZJ8H17qy+fXUF0n6Lvca3J16iy54u1l8 0wI9wtUZaAKqUpZYFrBryTxVR3sAr/Gt4UNlR4JjpzWxjcZreLf6t1F0SDxTIvbM rl924zBmyhHgZhnjj6kb3fWPXdksSQtgl5E4vKCKELrYfrTRWOyHjYiKeV5cX51b z3hkjeXc62Xmjw== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedujedrudeivddgheduucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvufffkffojghfggfgsedtkeertdertddtnecuhfhrohhmpeforgigihhm vgcutfhiphgrrhguuceomhgrgihimhgvsegtvghrnhhordhtvggthheqnecuggftrfgrth htvghrnhepvdekleevfeffkeejhfffueelteelfeduieefheduudfggffhhfffheevveeh hedvnecukfhppeeltddrkeelrdeikedrjeeinecuvehluhhsthgvrhfuihiivgepudenuc frrghrrghmpehmrghilhhfrhhomhepmhgrgihimhgvsegtvghrnhhordhtvggthh X-ME-Proxy: Received: from localhost (lfbn-tou-1-1502-76.w90-89.abo.wanadoo.fr [90.89.68.76]) by mail.messagingengine.com (Postfix) with ESMTPA id F1B8E108005E; Tue, 1 Dec 2020 08:12:57 -0500 (EST) From: Maxime Ripard To: Daniel Vetter , David Airlie , Maarten Lankhorst , Thomas Zimmermann , Maxime Ripard , Eric Anholt Subject: [PATCH v3 5/7] drm/vc4: hdmi: Use the connector state pixel rate for the PHY Date: Tue, 1 Dec 2020 14:12:47 +0100 Message-Id: <20201201131249.438273-6-maxime@cerno.tech> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201201131249.438273-1-maxime@cerno.tech> References: <20201201131249.438273-1-maxime@cerno.tech> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201201_081259_376482_F62B004C X-CRM114-Status: GOOD ( 15.48 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-rpi-kernel@lists.infradead.org, bcm-kernel-feedback-list@broadcom.com, linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, Dave Stevenson Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The PHY initialisation parameters are not based on the pixel clock but the TMDS clock rate which can be the pixel clock in the standard case, but could be adjusted based on some parameters like the bits per color. Since the TMDS clock rate is stored in our custom connector state already, let's reuse it from there instead of computing it again. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/vc4/vc4_hdmi.c | 2 +- drivers/gpu/drm/vc4/vc4_hdmi.h | 9 ++++----- drivers/gpu/drm/vc4/vc4_hdmi_phy.c | 8 +++++--- 3 files changed, 10 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c index 61baf3c39d43..64eff72d60b2 100644 --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c @@ -712,7 +712,7 @@ static void vc4_hdmi_encoder_pre_crtc_configure(struct drm_encoder *encoder, vc4_hdmi->variant->reset(vc4_hdmi); if (vc4_hdmi->variant->phy_init) - vc4_hdmi->variant->phy_init(vc4_hdmi, mode); + vc4_hdmi->variant->phy_init(vc4_hdmi, vc4_conn_state); HDMI_WRITE(HDMI_SCHEDULER_CONTROL, HDMI_READ(HDMI_SCHEDULER_CONTROL) | diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.h b/drivers/gpu/drm/vc4/vc4_hdmi.h index bca6943de884..6cc5b6652cca 100644 --- a/drivers/gpu/drm/vc4/vc4_hdmi.h +++ b/drivers/gpu/drm/vc4/vc4_hdmi.h @@ -21,10 +21,9 @@ to_vc4_hdmi_encoder(struct drm_encoder *encoder) return container_of(encoder, struct vc4_hdmi_encoder, base.base); } -struct drm_display_mode; - struct vc4_hdmi; struct vc4_hdmi_register; +struct vc4_hdmi_connector_state; enum vc4_hdmi_phy_channel { PHY_LANE_0 = 0, @@ -82,7 +81,7 @@ struct vc4_hdmi_variant { /* Callback to initialize the PHY according to the mode */ void (*phy_init)(struct vc4_hdmi *vc4_hdmi, - struct drm_display_mode *mode); + struct vc4_hdmi_connector_state *vc4_conn_state); /* Callback to disable the PHY */ void (*phy_disable)(struct vc4_hdmi *vc4_hdmi); @@ -192,13 +191,13 @@ conn_state_to_vc4_hdmi_conn_state(struct drm_connector_state *conn_state) } void vc4_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi, - struct drm_display_mode *mode); + struct vc4_hdmi_connector_state *vc4_conn_state); void vc4_hdmi_phy_disable(struct vc4_hdmi *vc4_hdmi); void vc4_hdmi_phy_rng_enable(struct vc4_hdmi *vc4_hdmi); void vc4_hdmi_phy_rng_disable(struct vc4_hdmi *vc4_hdmi); void vc5_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi, - struct drm_display_mode *mode); + struct vc4_hdmi_connector_state *vc4_conn_state); void vc5_hdmi_phy_disable(struct vc4_hdmi *vc4_hdmi); void vc5_hdmi_phy_rng_enable(struct vc4_hdmi *vc4_hdmi); void vc5_hdmi_phy_rng_disable(struct vc4_hdmi *vc4_hdmi); diff --git a/drivers/gpu/drm/vc4/vc4_hdmi_phy.c b/drivers/gpu/drm/vc4/vc4_hdmi_phy.c index 057796b54c51..36535480f8e2 100644 --- a/drivers/gpu/drm/vc4/vc4_hdmi_phy.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi_phy.c @@ -127,7 +127,8 @@ #define OSCILLATOR_FREQUENCY 54000000 -void vc4_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi, struct drm_display_mode *mode) +void vc4_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi, + struct vc4_hdmi_connector_state *conn_state) { /* PHY should be in reset, like * vc4_hdmi_encoder_disable() does. @@ -339,11 +340,12 @@ static void vc5_hdmi_reset_phy(struct vc4_hdmi *vc4_hdmi) HDMI_WRITE(HDMI_TX_PHY_POWERDOWN_CTL, BIT(10)); } -void vc5_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi, struct drm_display_mode *mode) +void vc5_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi, + struct vc4_hdmi_connector_state *conn_state) { const struct phy_lane_settings *chan0_settings, *chan1_settings, *chan2_settings, *clock_settings; const struct vc4_hdmi_variant *variant = vc4_hdmi->variant; - unsigned long long pixel_freq = mode->clock * 1000; + unsigned long long pixel_freq = conn_state->pixel_rate; unsigned long long vco_freq; unsigned char word_sel; u8 vco_sel, vco_div; -- 2.28.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel