From: muhammad.husaini.zulkifli@intel.com
To: ulf.hansson@linaro.org, adrian.hunter@intel.com,
michal.simek@xilinx.com, linux-mmc@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Cc: lakshmi.bai.raja.subramanian@intel.com,
muhammad.husaini.zulkifli@intel.com, mgross@linux.intel.com,
andriy.shevchenko@intel.com,
wan.ahmad.zainie.wan.mohamad@intel.com
Subject: [PATCH v6 2/4] firmware: keembay: Add support for Trusted Firmware Service call
Date: Wed, 2 Dec 2020 23:02:02 +0800 [thread overview]
Message-ID: <20201202150205.20150-3-muhammad.husaini.zulkifli@intel.com> (raw)
In-Reply-To: <20201202150205.20150-1-muhammad.husaini.zulkifli@intel.com>
From: Muhammad Husaini Zulkifli <muhammad.husaini.zulkifli@intel.com>
Export inline function to encapsulate AON_CFG1 for controling the
I/O Rail supplied voltage levels which communicate with Trusted Firmware.
Signed-off-by: Muhammad Husaini Zulkifli <muhammad.husaini.zulkifli@intel.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
---
include/linux/firmware/intel/keembay.h | 54 ++++++++++++++++++++++++++
1 file changed, 54 insertions(+)
create mode 100644 include/linux/firmware/intel/keembay.h
diff --git a/include/linux/firmware/intel/keembay.h b/include/linux/firmware/intel/keembay.h
new file mode 100644
index 000000000000..b5e3e490807e
--- /dev/null
+++ b/include/linux/firmware/intel/keembay.h
@@ -0,0 +1,54 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Intel Keembay SOC Firmware API Layer
+ *
+ * Copyright (C) 2020, Intel Corporation
+ *
+ * Author: Muhammad Husaini Zulkifli <Muhammad.Husaini.Zulkifli@intel.com>
+ */
+
+#ifndef __FIRMWARE_KEEMBAY_SMC_H__
+#define __FIRMWARE_KEEMBAY_SMC_H__
+
+#include <linux/arm-smccc.h>
+
+/*
+ * This file defines an API function that can be called by a device driver in order to
+ * communicate with Trusted Firmware - A profile(TF-A) or Trusted Firmware - M profile (TF-M).
+ */
+
+#define KEEMBAY_SET_1V8_IO_RAIL 1
+#define KEEMBAY_SET_3V3_IO_RAIL 0
+
+#define IOV_1V8 1800000
+#define IOV_3V3 3300000
+
+#define ARM_SMCCC_SIP_KEEMBAY_SET_SD_VOLTAGE \
+ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
+ ARM_SMCCC_SMC_32, \
+ ARM_SMCCC_OWNER_SIP, \
+ 0xFF26)
+
+#if IS_ENABLED(CONFIG_HAVE_ARM_SMCCC_DISCOVERY)
+/*
+ * Voltage applied on the IO Rail is controlled from the Always On Register using specific
+ * bits in AON_CGF1 register. This is a secure register. Keem Bay SOC cannot exposed this
+ * register address to the outside world.
+ */
+static inline int keembay_io_rail_supplied_voltage(int volt)
+{
+ struct arm_smccc_res res;
+
+ arm_smccc_1_1_invoke(ARM_SMCCC_SIP_KEEMBAY_SET_SD_VOLTAGE, volt, &res);
+ if ((int)res.a0 < 0)
+ return -EINVAL;
+
+ return 0;
+}
+#else
+static inline int keembay_io_rail_supplied_voltage(int volt)
+{
+ return -ENODEV;
+}
+#endif
+#endif /* __FIRMWARE_KEEMBAY_SMC_H__ */
--
2.17.1
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next prev parent reply other threads:[~2020-12-02 7:04 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-02 15:02 [PATCH v6 0/4] mmc: sdhci-of-arasan: Enable UHS-1 support for Keem Bay SOC muhammad.husaini.zulkifli
2020-12-02 10:53 ` Ulf Hansson
2020-12-02 12:25 ` Shevchenko, Andriy
2020-12-02 12:41 ` Ulf Hansson
2020-12-02 13:10 ` Andy Shevchenko
2020-12-02 14:10 ` Ulf Hansson
2020-12-02 14:34 ` Andy Shevchenko
2020-12-02 14:38 ` Zulkifli, Muhammad Husaini
2020-12-02 15:02 ` [PATCH v6 1/4] mmc: sdhci-of-arasan: Add structure device pointer in probe func muhammad.husaini.zulkifli
2020-12-02 15:02 ` muhammad.husaini.zulkifli [this message]
2020-12-02 15:02 ` [PATCH v6 3/4] dt-bindings: mmc: Add phys, vmmc and vqmmc supplies for Keem Bay SOC muhammad.husaini.zulkifli
2020-12-02 15:02 ` [PATCH v6 4/4] mmc: sdhci-of-arasan: Enable UHS-1 support " muhammad.husaini.zulkifli
2020-12-02 18:54 ` Linus Walleij
2020-12-03 7:10 ` Zulkifli, Muhammad Husaini
2020-12-03 8:12 ` Shevchenko, Andriy
2020-12-05 23:01 ` Linus Walleij
2020-12-12 14:06 ` Zulkifli, Muhammad Husaini
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