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Thu, 03 Dec 2020 09:28:34 +0000 Received: from hirez.programming.kicks-ass.net (hirez.programming.kicks-ass.net [192.168.1.225]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by noisy.programming.kicks-ass.net (Postfix) with ESMTPS id 8B87030018A; Thu, 3 Dec 2020 10:28:31 +0100 (CET) Received: by hirez.programming.kicks-ass.net (Postfix, from userid 1000) id 53C4E201BAA75; Thu, 3 Dec 2020 10:28:31 +0100 (CET) Date: Thu, 3 Dec 2020 10:28:31 +0100 From: Peter Zijlstra To: Valentin Schneider Subject: Re: [RFC PATCH v2 2/2] scheduler: add scheduler level for clusters Message-ID: <20201203092831.GH2414@hirez.programming.kicks-ass.net> References: <20201201025944.18260-1-song.bao.hua@hisilicon.com> <20201201025944.18260-3-song.bao.hua@hisilicon.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Barry Song , juri.lelli@redhat.com, vincent.guittot@linaro.org, prime.zeng@hisilicon.com, catalin.marinas@arm.com, Jonathan.Cameron@huawei.com, rjw@rjwysocki.net, linux-kernel@vger.kernel.org, rostedt@goodmis.org, linuxarm@huawei.com, bsegall@google.com, linux-acpi@vger.kernel.org, mingo@redhat.com, mgorman@suse.de, xuwei5@huawei.com, gregkh@linuxfoundation.org, mark.rutland@arm.com, will@kernel.org, dietmar.eggemann@arm.com, linux-arm-kernel@lists.infradead.org, lenb@kernel.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Dec 01, 2020 at 04:04:04PM +0000, Valentin Schneider wrote: > > Gating this behind this new config only leveraged by arm64 doesn't make it > very generic. Note that powerpc also has this newish "CACHE" level which > seems to overlap in function with your "CLUSTER" one (both are arch > specific, though). > > I think what you are after here is an SD_SHARE_PKG_RESOURCES domain walk, > i.e. scan CPUs by increasing cache "distance". We already have it in some > form, as we scan SMT & LLC domains; AFAICT LLC always maps to MC, except > for said powerpc's CACHE thingie. There's some intel chips with a smaller L2, but I don't think we ever bothered. There's also the extended topology stuff from Intel: SMT, Core, Module, Tile, Die, of which we've only partially used Die I think. Whatever we do, it might make sense to not all use different names. Also, I think Mel said he was cooking something for select_idle_balance(). Also, I've previously posted patches that fold all the iterations into one, so it might make sense to revisit some of that if Mel also already didn.t _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel