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Received: from shell.armlinux.org.uk ([fd8f:7570:feb6:1:5054:ff:fe00:4ec]:39692) by pandora.armlinux.org.uk with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1klBYc-0004PB-LG; Fri, 04 Dec 2020 13:55:34 +0000 Received: from linux by shell.armlinux.org.uk with local (Exim 4.92) (envelope-from ) id 1klBYb-0000iN-4v; Fri, 04 Dec 2020 13:55:33 +0000 Date: Fri, 4 Dec 2020 13:55:33 +0000 From: Russell King - ARM Linux admin To: Steen Hegelund Subject: Re: [PATCH v8 3/4] phy: Add Sparx5 ethernet serdes PHY driver Message-ID: <20201204135532.GK1551@shell.armlinux.org.uk> References: <20201203103015.3735373-1-steen.hegelund@microchip.com> <20201203103015.3735373-4-steen.hegelund@microchip.com> <20201203215253.GL2333853@lunn.ch> <20201204134826.lnkdtj5nrygsngm2@mchp-dev-shegelun> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20201204134826.lnkdtj5nrygsngm2@mchp-dev-shegelun> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201204_085539_125276_427AB3D6 X-CRM114-Status: GOOD ( 19.08 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Lunn , Alexandre Belloni , Bjarni Jonasson , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Kishon Vijay Abraham I , Vinod Koul , linux-arm-kernel@lists.infradead.org, Microchip UNG Driver List , Lars Povlsen Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Dec 04, 2020 at 02:48:26PM +0100, Steen Hegelund wrote: > On 03.12.2020 22:52, Andrew Lunn wrote: > > What i have not yet seen is how this code plugs together with > > phylink_pcs_ops? > > > > Can this hardware also be used for SATA, USB? As far as i understand, > > the Marvell Comphy is multi-purpose, it is used for networking, USB, > > and SATA, etc. Making it a generic PHY then makes sense, because > > different subsystems need to use it. > > > > But it looks like this is for networking only? So i'm wondering if it > > belongs in driver/net/pcs and it should be accessed using > > phylink_pcs_ops? > > > > Andrew > > This is a PHY that communicates on a SerDes link to an ethernet PHY or a > SFP. So I took the lead from earlier work: the Microsemi Ocelot SerDes driver, > and added the Sparx5 SerDes PHY driver here since it is very similar in intent. > It is not an ethernet PHY as such. Okay, that is the normal situation in real hardware: MAC <---> PCS PHY <---> SerDes PHY <---> SerDes lanes where the PCS PHY handles the protocol level, and the SerDes PHY handles the clocking and electrical characteristics of the SerDes lanes. Maybe we should ask for a diagram of the setups when new support is submitted to make the process of understanding the hardware easier? -- RMK's Patch system: https://www.armlinux.org.uk/developer/patches/ FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last! _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel